|
otsdaq_prepmodernization
v2_05_00
|
Libraries | |
| IEEE | |
Use Clauses | |
| IEEE.std_logic_1164.all | |
| IEEE.std_logic_arith.all | |
| IEEE.std_logic_unsigned.all | |
| params_package.all | |
Ports | |
| addr | in STD_LOGIC_VECTOR ( 63 downto 0 ) |
| clock | in STD_LOGIC |
| data | in STD_LOGIC_VECTOR ( 31 downto 0 ) |
| reset_n | in STD_LOGIC |
| we | in STD_LOGIC |
| data_out | out STD_LOGIC_VECTOR ( 31 downto 0 ) |
| wr_out | out STD_LOGIC |
Definition at line 27 of file dev_wr_gate_t.vhd.