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otsdaq_prepmodernization
v2_05_00
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Libraries | |
| ieee | |
Use Clauses | |
| ieee.std_logic_1164.all | |
| ieee.std_logic_unsigned.all | |
| IEEE.std_logic_arith.all | |
| IEEE.std_logic_misc.all | |
Generics | |
| WIDTH | integer := 8 |
| SEED | integer := 3 |
Ports | |
| CLK | in STD_LOGIC |
| RESET | in STD_LOGIC |
| ENABLE | in STD_LOGIC |
| RANDOM_NUM | out STD_LOGIC_VECTOR ( WIDTH - 1 downto 0 ) |
Definition at line 68 of file ADC_FIFO_rng.vhd.