47 set device xc4vlx25ff668-10
48 set projName Ethernet_RAM
49 set design Ethernet_RAM
50 set projDir [
file dirname [
info script]]
51 create_project $projName $projDir/results/$projName -part $device -force
52 set_property design_mode RTL [current_fileset -srcset]
53 set top_module Ethernet_RAM_exdes
54 add_files -norecurse {../../example_design/Ethernet_RAM_exdes.vhd}
55 add_files -norecurse {./Ethernet_RAM.ngc}
56 import_files -fileset [get_filesets constrs_1] -force -norecurse {../../example_design/Ethernet_RAM_exdes.xdc}
57 set_property top Ethernet_RAM_exdes [get_property srcset [current_run]]
62 write_sdf -rename_top_module Ethernet_RAM_exdes -file routed.sdf
63 write_vhdl -mode sim routed.vhd
64 report_timing -nworst 30 -path_type full -file routed.twr
65 report_drc -file report.drc
66 write_bitstream -bitgen_options {-g UnconstrainedPins:Allow}