otsdaq_prepmodernization  v2_04_02
filter_data_out.vhd
1 -- Author: Ryan Rivera, FNAL
2 
3 library IEEE;
4 use IEEE.std_logic_1164.all;
5 use IEEE.std_logic_arith.all;
6 use IEEE.std_logic_unsigned.all;
7 
8  -- when enable is high out_data = rx_data, else out_data = 0.
9 entity filter_data_out is
10  port (
11  enable : in std_logic;
12  rx_data : in std_logic_vector(7 downto 0);
13  out_data : out std_logic_vector(7 downto 0)
14  ) ;
15 end;
16 
17 
18 architecture filter_data_out_arch of filter_data_out is
19 begin
20 
21  out_data <= rx_data when enable = '1' else (others => '0');
22 
23 end filter_data_out_arch;