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otsdaq_prepmodernization
v2_04_01
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Libraries | |
| IEEE | |
Use Clauses | |
| IEEE.std_logic_1164.all | |
| IEEE.std_logic_arith.all | |
| IEEE.std_logic_unsigned.all | |
| params_package.all | |
Ports | |
| block_en | in STD_LOGIC |
| clock | in STD_LOGIC |
| data_fifo_full | in STD_LOGIC |
| data_fifo_wrerr | in STD_LOGIC |
| gec_user_crc_err | in STD_LOGIC |
| gec_user_rx_data_out | in STD_LOGIC_VECTOR ( 7 downto 0 ) |
| gec_user_rx_size_out | in STD_LOGIC_VECTOR ( 10 downto 0 ) |
| gec_user_rx_valid_out | in STD_LOGIC |
| reset_n | in STD_LOGIC |
| crc_err_flag | out STD_LOGIC |
| data_fifo_q_w_data | out STD_LOGIC_VECTOR ( 63 downto 0 ) |
| data_fifo_wren | out STD_LOGIC |
| info_fifo_wr_data | out STD_LOGIC_VECTOR ( 15 downto 0 ) |
| info_fifo_wren | out STD_LOGIC |
Definition at line 27 of file GEC_RX_CTL_8.vhd.