|
otsdaq_prepmodernization
v2_04_01
|
Libraries | |
| ieee | |
| XilinxCoreLib | |
Use Clauses | |
| ieee.std_logic_1164.all | |
Ports | |
| a | in STD_LOGIC_VECTOR ( 10 downto 0 ) |
| d | in STD_LOGIC_VECTOR ( 63 downto 0 ) |
| clk | in STD_LOGIC |
| we | in STD_LOGIC |
| spo | out STD_LOGIC_VECTOR ( 63 downto 0 ) |
Definition at line 43 of file Ethernet_RAM.vhd.