|
otsdaq_prepmodernization
v2_04_01
|
Libraries | |
| ieee | |
| XilinxCoreLib | |
Use Clauses | |
| ieee.std_logic_1164.all | |
Ports | |
| clk | in std_logic |
| din | in std_logic_VECTOR ( 63 downto 0 ) |
| rd_en | in std_logic |
| srst | in std_logic |
| wr_en | in std_logic |
| dout | out std_logic_VECTOR ( 63 downto 0 ) |
| empty | out std_logic |
| full | out std_logic |
Definition at line 43 of file DATA_FIFO_0.vhd.