otsdaq_prepmodernization  v2_04_01
params_package.vhd
1 -------------------------------------------------------------------------------
2 --
3 -- Title : params_package
4 -- Design : CAPTAN
5 -- Author : aprosser
6 -- Company : CD_CEPA_ESE
7 --
8 -------------------------------------------------------------------------------
9 --
10 -- File : params_package.vhd
11 -- Generated : Mon Jun 9 15:12:08 2008
12 -- From : interface description file
13 -- By : Itf2Vhdl ver. 1.20
14 --
15 -------------------------------------------------------------------------------
16 --
17 -- Description :
18 --
19 -------------------------------------------------------------------------------
20 
21 --{{ Section below this comment is automatically maintained
22 -- and may be overwritten
23 --{entity {params_package} architecture {params_package}}
24 
25 
26 library IEEE;
27 use IEEE.STD_LOGIC_1164.all;
28 use IEEE.STD_LOGIC_ARITH.all;
29 use IEEE.STD_LOGIC_UNSIGNED.all;
30 package params_package is
31 
32 -- Constants
33 -- 3 bit constants
34  constant v_3_0: std_logic_vector := "000";
35  constant v_3_1: std_logic_vector := "001";
36  constant v_3_7: std_logic_vector := "111";
37 
38 -- 5 bit constants
39  constant v_5_0: std_logic_vector := "00000";
40  constant v_5_1: std_logic_vector := "00001";
41  constant v_5_22: std_logic_vector := "10110";
42 -- for CRC Loop counting from GEC
43 
44 -- 8 bit constants
45  constant v_8_0: std_logic_vector := "00000000";
46  constant v_8_1: std_logic_vector := "00000001";
47  constant v_8_255: std_logic_vector := "11111111";
48 
49 -- 11 bit constants
50  constant v_11_0: std_logic_vector := "00000000000";
51  constant v_11_1: std_logic_vector := "00000000001";
52  constant v_11_2: std_logic_vector := "00000000010";
53 
54 -- 16 bit constants
55  constant v_16_0: std_logic_vector := "0000000000000000";
56  constant v_16_1: std_logic_vector := "0000000000000001";
57  constant delay_term: std_logic_vector := x"000A"; --x"07D0";
58 
59 -- 32 bit constants:
60  constant v_32_0: std_logic_vector := "00000000000000000000000000000000";
61  constant v_32_1: std_logic_vector := "00000000000000000000000000000001";
62 
63 -- 64 bit constants:
64  constant v_64_0: std_logic_vector := "0000000000000000000000000000000000000000000000000000000000000000";
65  constant v_64_1: std_logic_vector := "0000000000000000000000000000000000000000000000000000000000000001";
66  constant dev_addr0: std_logic_vector := "0100000000000000000000000000000000000000000000000000000000000000";
67  constant dev_addr1: std_logic_vector := "0100000000000000000000000000000000000000000000000000000000000001";
68  -- test value
69 end params_package;
70 
71 package body params_package is
72 
73 -- Functions and procedures
74 end params_package;