otsdaq_prepmodernization  v2_04_01
GEC_TX_CTL_1.vhd
1 -------------------------------------------------------------------------------
2 --
3 -- Title : GEC_TX_CTL_1
4 -- Design : CAPTAN
5 -- Author : aprosser
6 -- Company : CD_CEPA_ESE
7 --
8 -------------------------------------------------------------------------------
9 --
10 -- File : u:\CAPTAN\Data_Conversion_Board\CAPTAN\CAPTAN\compile\GEC_TX_CTL_1.vhd
11 -- Generated : 07/28/08 15:51:45
12 -- From : u:/CAPTAN/Data_Conversion_Board/CAPTAN/CAPTAN/src/GEC_TX_CTL_1.asf
13 -- By : FSM2VHDL ver. 5.0.0.9
14 --
15 -------------------------------------------------------------------------------
16 --
17 -- Description :
18 --
19 -------------------------------------------------------------------------------
20 
21 library IEEE;
22 use IEEE.std_logic_1164.all;
23 use IEEE.std_logic_arith.all;
24 use IEEE.std_logic_unsigned.all;
25 use params_package.all;
26 
27 entity gec_tx_ctl_1 is
28  port (
29  block_en: in STD_LOGIC;
30  clk: in STD_LOGIC;
31  data_fifo_empty: in STD_LOGIC;
32  data_fifo_rd_data: in STD_LOGIC_VECTOR (63 downto 0);
33  data_fifo_rderr: in STD_LOGIC;
34  gec_user_busy: in STD_LOGIC;
35  gec_user_tx_enable_out: in STD_LOGIC;
36  info_fifo_empty: in STD_LOGIC;
37  info_fifo_rd_data: in STD_LOGIC_VECTOR (15 downto 0);
38  info_fifo_rderr: in STD_LOGIC;
39  reset_n: in STD_LOGIC;
40  data_fifo_rden: out STD_LOGIC;
41  data_fifo_rden_en: out STD_LOGIC;
42  gec_user_trigger: out STD_LOGIC;
43  gec_user_tx_data_in: out STD_LOGIC_VECTOR (7 downto 0);
44  gec_user_tx_size_in: out STD_LOGIC_VECTOR (10 downto 0);
45  info_fifo_rden: out STD_LOGIC);
46 end gec_tx_ctl_1;
47 
48 architecture gec_tx_ctl_1 of GEC_TX_CTL_1 is
49 
50 -- diagram signals declarations
51 signal byte_count: STD_LOGIC_VECTOR (2 downto 0);
52 signal data_fifo_rd_data_reg: STD_LOGIC_VECTOR (63 downto 0);
53 signal q_w_count: STD_LOGIC_VECTOR (4 downto 0);
54 signal tx_data_count: STD_LOGIC_VECTOR (10 downto 0);
55 
56 -- SYMBOLIC ENCODED state machine: Sreg0
57 type Sreg0_type is (
58  idle, enabled, chk_busy, txmtdone, data_rdy_read_Ififo, trgrd, data_rdy_savecount, txmt_xmiting, S1, S2, txmt_S3, S4
59 );
60 -- attribute enum_encoding of Sreg0_type: type is ... -- enum_encoding attribute is not supported for symbolic encoding
61 
62 signal Sreg0: Sreg0_type;
63 
64 begin
65 
66 
67 ----------------------------------------------------------------------
68 -- Machine: Sreg0
69 ----------------------------------------------------------------------
70 Sreg0_machine: process (clk)
71 begin
72  if clk'event and clk = '1' then
73  if reset_n = '0' then
74  Sreg0 <= idle;
75  -- Set default values for outputs, signals and variables
76  -- ...
77  gec_user_trigger <= '0';
78  gec_user_tx_size_in <= v_11_0;
79  q_w_count <= v_5_0;
80  tx_data_count <= v_11_0;
81  info_fifo_rden <= '0';
82  data_fifo_rden <= '0';
83  data_fifo_rden_en <= '0';
84  data_fifo_rd_data_reg <= v_64_0;
85  byte_count <= "000";
86  else
87  -- Set default values for outputs, signals and variables
88  -- ...
89  case Sreg0 is
90  when idle =>
91  if block_en = '0' then
92  Sreg0 <= idle;
93  elsif block_en = '1' then
94  Sreg0 <= enabled;
95  end if;
96  when enabled =>
97  if info_fifo_empty = '0' and block_en = '1' then -- FIFO has an entry
98  Sreg0 <= data_rdy_read_Ififo;
99  info_fifo_rden <= '1';
100  -- Read the info word
101  byte_count <= "000";
102  --data_fifo_rden_en <= '1';
103  -- this enables the OR'd
104  -- conbination of user_tx_enable_out
105  -- and data_fifo_rden
106  elsif block_en = '0' then
107  Sreg0 <= idle;
108  elsif info_fifo_empty = '1' and block_en = '1' then -- FIFO is empty
109  Sreg0 <= enabled;
110  end if;
111  when chk_busy =>
112  if gec_user_busy = '0' then
113  Sreg0 <= trgrd;
114  gec_user_trigger <= '1';
115  -- GEC not busy
116  -- assert trigger to GEC
117  if (tx_data_count /= v_11_1) then
118  data_fifo_rd_data_reg <= data_fifo_rd_data;
119  -- prepare first quad word if there is one
120  end if;
121  elsif gec_user_busy = '1' then
122  Sreg0 <= chk_busy;
123  data_fifo_rden <= '0';
124  -- finished reading quad word fifo for first quad word
125  end if;
126  when txmtdone =>
127  if block_en = '1' then
128  Sreg0 <= enabled;
129  elsif block_en = '0' then
130  Sreg0 <= idle;
131  end if;
132  when trgrd =>
133  if gec_user_tx_enable_out = '0' then -- wait for enable tx reply
134  Sreg0 <= trgrd;
135  elsif gec_user_tx_enable_out = '1' then
136  Sreg0 <= txmt_xmiting;
137  if (tx_data_count = v_11_1) then
138  data_fifo_rden_en <= '0';
139  -- turn off FIFO accesses early
140  -- only one byte is requested and
141  -- it has been preloaded (this should
142  -- not happen in loopback tests
143  else
144  -- update the data presented to the GEC
145  gec_user_tx_data_in <= data_fifo_rd_data(63 downto 56);
146  -- was *_reg and not working?
147  -- increment the byte count
148  byte_count <= "001";
149  end if;
150  -- decrement count of bytes;
151  -- user_tx_enable_out from the GEC is
152  -- enabling read operations on the data
153  -- FIFO
154  end if;
155  when S1 =>
156  Sreg0 <= S2;
157  tx_data_count <= tx_data_count + v_11_1;
158  -- add return code byte to
159  -- produce the final number of bytes
160  when S2 =>
161  Sreg0 <= S4;
162  gec_user_tx_size_in <= tx_data_count;
163  -- present byte count to GEC
164  if (tx_data_count /= v_11_1) then
165  -- read a quad word for initialization
166  data_fifo_rden_en <= '1';
167  data_fifo_rden <= '1';
168  end if;
169  when S4 =>
170  Sreg0 <= chk_busy;
171  data_fifo_rden <= '0';
172  when data_rdy_read_Ififo =>
173  Sreg0 <= data_rdy_savecount;
174  info_fifo_rden <= '0';
175  -- terminate info word read
176  -- handled later data_fifo_rden <= '1';
177  -- read the first data byte for preset
178  -- data has to be handled by this controller
179  when data_rdy_savecount =>
180  Sreg0 <= S1;
181  q_w_count <= info_fifo_rd_data(12 downto 8);
182  -- get number of quad words
183  gec_user_tx_data_in <= info_fifo_rd_data(7 downto 0);
184  -- assert the return code to the GEC
185  -- when Ryan's enable out signal goes high
186  -- the return code is there already
187  tx_data_count <= "000" & info_fifo_rd_data(12 downto 8) & "000";
188  -- compute number of bytes in quad words to be returned to PC
189  -- multiplies quad word count by 8
190  data_fifo_rden <= '0';
191  -- terminate first data word read
192  -- Data should be present at the output
193  -- of the data FIFO (and the input to the
194  -- GEC)
195  --data_fifo_rd_data_reg <= data_fifo_rd_data;
196  -- Jefferson commment the above because it appears
197  --you commented out the data_fifo_rden
198  -- to allow you to handle it later
199  -- we handle the first data quad word
200  when txmt_xmiting =>
201  if tx_data_count = v_11_1 then
202  Sreg0 <= txmt_S3;
203  gec_user_trigger <= '0';
204  gec_user_tx_size_in <= v_11_0;
205  tx_data_count <= v_11_0;
206  info_fifo_rden <= '0';
207  data_fifo_rden <= '0';
208  data_fifo_rden_en <= '0';
209  elsif q_w_count /= v_5_0 then --q_w_count > v_5_1
210  Sreg0 <= txmt_xmiting;
211  case byte_count is
212  when "000" =>
213  byte_count <= byte_count + v_3_1;
214  gec_user_tx_data_in <= data_fifo_rd_data_reg(63 downto 56);
215  when "001" =>
216  byte_count <= byte_count + v_3_1;
217  gec_user_tx_data_in <= data_fifo_rd_data_reg(55 downto 48);
218  when "010" =>
219  byte_count <= byte_count + v_3_1;
220  gec_user_tx_data_in <= data_fifo_rd_data_reg(47 downto 40);
221  -- Read a new data quad word with plenty of time to spare
222  -- Jefferson did this to compensate for commenting
223  --out the action done when q_w_count =v_5_1
224  if (q_w_count > v_5_1)then
225  data_fifo_rden <= '1';
226  end if;
227  when "011" =>
228  byte_count <= byte_count + v_3_1;
229  gec_user_tx_data_in <= data_fifo_rd_data_reg(39 downto 32);
230  -- Finish read a new data quad word with plenty of time to spare
231  data_fifo_rden <= '0';
232  when "100" =>
233  byte_count <= byte_count + v_3_1;
234  gec_user_tx_data_in <= data_fifo_rd_data_reg(31 downto 24);
235  -- at this point, the data_fifo_rd_data lines have the
236  -- next quad word sitting on them
237  when "101" =>
238  byte_count <= byte_count + v_3_1;
239  gec_user_tx_data_in <= data_fifo_rd_data_reg(23 downto 16);
240  when "110" =>
241  byte_count <= byte_count + v_3_1;
242  gec_user_tx_data_in <= data_fifo_rd_data_reg(15 downto 8);
243  when "111" =>
244  byte_count <= "000";
245  gec_user_tx_data_in <= data_fifo_rd_data_reg(7 downto 0);
246  -- read another quad word
247  data_fifo_rd_data_reg <= data_fifo_rd_data;
248  -- we latch the data into the internal register
249  -- data_fifo_rd_data_reg
250  q_w_count <= q_w_count - v_5_1;
251  -- decrement the quad word count after we process the 8 bytes
252  -- in a quad word
253  when others =>
254  byte_count <= "000";
255  --null;
256  end case;
257  elsif q_w_count = v_5_0 then --q_w_count = v_5_1
258  Sreg0 <= txmt_S3;
259  gec_user_trigger <= '0';
260  gec_user_tx_size_in <= v_11_0;
261  tx_data_count <= v_11_0;
262  info_fifo_rden <= '0';
263  data_fifo_rden <= '0';
264  data_fifo_rden_en <= '0';
265  --Jefferson commented this out because it caused only
266  -- the first case (when "000") was being run
267  -- I think it is because this is not a loop
268  --case byte_count is
269  -- when "000" =>
270  -- byte_count <= byte_count + v_3_1;
271  -- gec_user_tx_data_in <= data_fifo_rd_data_reg(7 downto 0);
272  -- when "001" =>
273  -- byte_count <= byte_count + v_3_1;
274  -- gec_user_tx_data_in <= data_fifo_rd_data_reg(15 downto 8);
275  -- when "010" =>
276  -- byte_count <= byte_count + v_3_1;
277  -- gec_user_tx_data_in <= data_fifo_rd_data_reg(23 downto 16);
278  ---- Read a new data quad word with plenty of time to spare
279  ---- data_fifo_rden <= '1';
280  -- when "011" =>
281  -- byte_count <= byte_count + v_3_1;
282  -- gec_user_tx_data_in <= data_fifo_rd_data_reg(31 downto 24);
283  ---- Finish read a new data quad word with plenty of time to spare
284  -- data_fifo_rden <= '0';
285  -- when "100" =>
286  -- byte_count <= byte_count + v_3_1;
287  -- gec_user_tx_data_in <= data_fifo_rd_data_reg(39 downto 32);
288  ---- at this point, the data_fifo_rd_data lines have the
289  ---- next quad word sitting on them
290  -- when "101" =>
291  -- byte_count <= byte_count + v_3_1;
292  -- gec_user_tx_data_in <= data_fifo_rd_data_reg(47 downto 40);
293  -- when "110" =>
294  -- byte_count <= byte_count + v_3_1;
295  -- gec_user_tx_data_in <= data_fifo_rd_data_reg(55 downto 48);
296  -- when "111" =>
297  -- byte_count <= "000";
298  -- gec_user_tx_data_in <= data_fifo_rd_data_reg(63 downto 56);
299  ---- read another quad word
300  ---- data_fifo_rd_data_reg <= data_fifo_rd_data;
301  ---- we latch the data into the internal register
302  ---- data_fifo_rd_data_reg
303  ---- q_w_count <= q_w_count - v_5_1;
304  ---- decrement the quad word count after we process the 8 bytes
305  ---- in a quad word
306  -- when others =>
307  -- byte_count <= "000";
308  -- --null;
309  --end case;
310  --
311  end if;
312  when txmt_S3 =>
313  Sreg0 <= txmtdone;
314  gec_user_trigger <= '0';
315  gec_user_tx_size_in <= v_11_0;
316  tx_data_count <= v_11_0;
317  info_fifo_rden <= '0';
318  data_fifo_rden <= '0';
319  data_fifo_rden_en <= '0';
320  gec_user_trigger <= '0';
321  gec_user_tx_size_in <= v_11_0;
322  tx_data_count <= v_11_0;
323  info_fifo_rden <= '0';
324  data_fifo_rden <= '0';
325  data_fifo_rden_en <= '0';
326  when others =>
327  null;
328  end case;
329  end if;
330  end if;
331 end process;
332 
333 end GEC_TX_CTL_1;