otsdaq_prepmodernization  v2_04_01
user_addrs_mux.vhd
1 -- Author: Ryan Rivera, FNAL
2 
3 library IEEE;
4 use IEEE.std_logic_1164.all;
5 use IEEE.std_logic_arith.all;
6 use IEEE.std_logic_unsigned.all;
7 
8 entity user_addrs_mux is
9  port (
10  user_addrs : in std_logic_vector(7 downto 0);
11  user_length : in std_logic_vector(10 downto 0);
12  test_mode : in std_logic;
13  ping_mode : in std_logic;
14 
15  udp_tx_length : out std_logic_vector(10 downto 0);
16 
17  addrs_out : out std_logic_vector(7 downto 0)
18  ) ;
19 end;
20 
21 
22 architecture user_addrs_mux_arch of user_addrs_mux is
23 begin
24 
25 
26  addrs_out <= x"03" when test_mode = '1' else user_addrs;
27  udp_tx_length <= --"000" & x"05"; -- "101" & x"C0"; -- range: 0 to x5C0 (1472)
28  "000" & x"02" when ping_mode = '1' else
29  "000" & x"05" when test_mode = '1' else
30  user_length;
31 
32 end user_addrs_mux_arch;