otsdaq_components  v2_04_02
FSSRFirmwareDefinitions.h
1 #ifndef _ots_FSSRFirmwareDefinitions_h
2 #define _ots_FSSRFirmwareDefinitions_h
3 
4 #include <stdint.h>
5 
6 namespace ots
7 {
8 const uint64_t EnableSPIPixelNormalDataAddress = 0x300;
9 // const UInt64 ChannelFIFOAddress[2] = {0x300,0x300};
10 
11 const uint32_t STRIP_CSR = 0xc4000000;
12 const uint32_t STRIP_RESET = 0xc4000004;
13 const uint32_t STRIP_SC_CSR = 0xc4000008; // Command/status register
14 const uint32_t STRIP_SCI = 0xc4000010; // Write address for registers
15 const uint32_t STRIP_SCI0 = 0xc4000010; // Write address for mask bits
16 const uint32_t STRIP_SCI1 = 0xc4000014; // Write address for mask bits
17 const uint32_t STRIP_SCI2 = 0xc4000018; // Write address for mask bits
18 const uint32_t STRIP_SCI3 = 0xc400001c; // Write address for mask bits
19 const uint32_t STRIP_SCO = 0xc4000020; // Read address for registers
20 const uint32_t STRIP_SCO0 = 0xc4000020; // Read address for mask bits
21 const uint32_t STRIP_SCO1 = 0xc4000024; // Read address for mask bits
22 const uint32_t STRIP_SCO2 = 0xc4000028; // Read address for mask bits
23 const uint32_t STRIP_SCO3 = 0xc400002c; // Read address for mask bits
24 const uint32_t STRIP_FIFO_CSR = 0xc4000030;
25 const uint32_t STRIP_FIFO_DATA = 0xc4000034;
26 const uint32_t STRIP_ANALYSIS_CSR = 0xc4000038;
27 const uint32_t STRIP_ANALYSIS_BCO_COUNTER = 0xc400003c;
28 const uint32_t STRIP_ANALYSIS_CHIP1_HIT_COUNTER = 0xc400013c;
29 const uint32_t STRIP_ANALYSIS_CHIP2_HIT_COUNTER = 0xc400023c;
30 const uint32_t STRIP_ANALYSIS_CHIP3_HIT_COUNTER = 0xc400033c;
31 const uint32_t STRIP_ANALYSIS_CHIP4_HIT_COUNTER = 0xc400043c;
32 const uint32_t STRIP_ANALYSIS_CHIP5_HIT_COUNTER = 0xc400053c;
33 const uint32_t STRIP_CHIP1_STATUS = 0xc4000130;
34 const uint32_t STRIP_CHIP2_STATUS = 0xc4000230;
35 const uint32_t STRIP_CHIP3_STATUS = 0xc4000330;
36 const uint32_t STRIP_CHIP4_STATUS = 0xc4000430;
37 const uint32_t STRIP_CHIP5_STATUS = 0xc4000530;
38 const uint32_t STRIP_BCO_COUNTER_LOW = 0xc4000040;
39 const uint32_t STRIP_BCO_COUNTER_HIGH = 0xc4000044;
40 const uint32_t STRIP_BCO_DCM = 0xc4000048;
41 // const uint32_t STRIP_STREAM_STATUS = 0xc400004c;
42 const uint32_t STRIP_DAC_CSR = 0xc4000050;
43 const uint32_t STRIP_DAC_INPUT = 0xc4000054;
44 const uint32_t STRIP_DAC_SPI = 0xc4000058;
45 // const uint32_t STRIP_WORDS_DUMPED = 0xc400005c;
46 const uint32_t STRIP_TRIG_CSR = 0xc4000060;
47 // const uint32_t STRIP_TRIG_FIFO_DATA = 0xc4000064;
48 const uint32_t STRIP_TRIG_UNBIASED = 0xc4000068;
49 const uint32_t STRIP_TRIG_INPUT_0 = 0xc4000070;
50 const uint32_t STRIP_TRIG_INPUT_1 = 0xc4000074;
51 const uint32_t STRIP_TRIG_INPUT_2 = 0xc4000078;
52 const uint32_t STRIP_TRIG_INPUT_3 = 0xc400007c;
53 // const uint32_t STRIP_TRIGNUM_LOW = 0xc4000080;
54 // const uint32_t STRIP_TRIGNUM_HIGH = 0xc4000084;
55 const uint32_t ETHIO_DESTINATION_PORT = 0xc1000018;
56 const uint32_t DATA_DESTINATION_IP = 0xc10000a4;
57 const uint32_t DATA_SOURCE_DESTINATION_PORT = 0xc10000a8;
58 
59 const uint32_t STRIP_TRIM_CSR = 0xc4000088;
60 const uint32_t STRIP_TLK_CSR = 0xc3000000;
61 
62 const double EXTERNAL_CLOCK_FREQUENCY = 54; // base freq: 54MHz
63 const double INTERNAL_CLOCK_FREQUENCY = 66.667; // base freq: 66.667MHz
64 
65 const uint32_t ChannelFIFOAddress[6] = {
66  STRIP_SCI, STRIP_SCI, STRIP_SCI, STRIP_SCI, STRIP_SCI, STRIP_SCI};
67 
68 const uint8_t WRITE = 1;
69 const uint8_t SET = 2;
70 const uint8_t READ = 4;
71 const uint8_t RESET = 5;
72 const uint8_t CLEAR = 5;
73 const uint8_t DEFAULT = 6;
74 const uint8_t WAITCLR = 7;
75 const uint8_t WAITSET = 8;
76 
77 const uint8_t STIB_DAC_WRITE_MAX = 36;
78 }
79 
80 #endif