otsdaq_components  v2_03_00
FSSRFirmwareBase.cc
1 #include "otsdaq-components/DAQHardware/FSSRFirmwareBase.h"
2 
3 #include "otsdaq-core/Macros/CoutMacros.h"
4 #include "otsdaq-core/MessageFacility/MessageFacility.h"
5 
6 #include "otsdaq-components/DAQHardware/FSSRFirmwareDefinitions.h"
7 #include "otsdaq-components/DetectorHardware/FSSRROCDefinitions.h"
8 #include "otsdaq-core/BitManipulator/BitManipulator.h"
9 
10 #include <arpa/inet.h>
11 #include <netinet/in.h>
12 #include <sys/socket.h>
13 
14 #include <cstdlib>
15 #include <iostream>
16 
17 #include "otsdaq-components/DAQHardware/FrontEndFirmwareBase.h"
18 #include "otsdaq-components/DAQHardware/OtsUDPFirmwareCore.h"
19 #include "otsdaq-components/DAQHardware/PurdueFirmwareCore.h"
20 
21 using namespace ots;
22 
23 const std::string FSSRFirmwareBase::PURDUE_FIRMWARE_NAME = "PurdueFSSRFirmware";
24 const std::string FSSRFirmwareBase::OTS_FIRMWARE_NAME = "OtsUDPFSSRFirmware";
25 
26 //========================================================================================================================
27 FSSRFirmwareBase::FSSRFirmwareBase(const std::string& communicationFirmwareType,
28  unsigned int communicationFirmwareVersion,
29  unsigned int version)
30  : stripCSRRegisterValue_(0), communicationFirmwareType_(communicationFirmwareType)
31 {
32  // choose: OtsUDPFirmwareCore or PurdueFirmwareCore
33  if(communicationFirmwareType ==
34  FSSRFirmwareBase::PURDUE_FIRMWARE_NAME) // could also use string and: if(choice ==
35  // "purdue") etc.
36  communicationFirmwareInstance_ =
37  new PurdueFirmwareCore(communicationFirmwareVersion);
38  else if(communicationFirmwareType ==
39  FSSRFirmwareBase::OTS_FIRMWARE_NAME) // AUG-17-2017 RAR dissociated because
40  // function calls are entirely
41  // independent from PURDUE firmware
42  // calls
43  // //
44  communicationFirmwareInstance_ =
45  new OtsUDPFirmwareCore(communicationFirmwareVersion);
46  else
47  {
48  __SS__ << "Unknown communication firmware type choice: "
49  << communicationFirmwareType << std::endl;
50  __COUT_ERR__ << ss.str();
51  __SS_THROW__;
52  }
53 
54  // now we can call write/read etc with
55  // communicationFirmwareInstance_->write,
56  // communicationFirmwareInstance_->read, etc
57 }
58 
59 //========================================================================================================================
60 FSSRFirmwareBase::~FSSRFirmwareBase(void)
61 {
62  delete communicationFirmwareInstance_;
63  communicationFirmwareInstance_ = NULL;
64 }
65 
66 //========================================================================================================================
67 void FSSRFirmwareBase::init(void) {}
68 
69 //========================================================================================================================
70 std::string FSSRFirmwareBase::universalRead(char* address)
71 {
72  __COUT__ << "universalRead communicationFirmwareType_ " << communicationFirmwareType_
73  << std::endl;
74  return communicationFirmwareInstance_->read(address);
75 }
76 
77 //========================================================================================================================
78 std::string FSSRFirmwareBase::universalWrite(char* address, char* data)
79 {
80  __COUT__ << "universalWrite communicationFirmwareType_ " << communicationFirmwareType_
81  << std::endl;
82  return communicationFirmwareInstance_->write(address, data);
83 }
84 
85 //========================================================================================================================
86 uint32_t FSSRFirmwareBase::createRegisterFromValue(std::string& readBuffer,
87  std::string& receivedValue)
88 {
89  return communicationFirmwareInstance_->createRegisterFromValue(readBuffer,
90  receivedValue);
91 }
92 
93 //========================================================================================================================
94 std::string FSSRFirmwareBase::configureClocks(std::string source, double frequency)
95 {
96  // std::cout << __COUT_HDR_FL__ << "Writing Clock configuration!" << std::endl;
97 
98  std::string buffer;
99  // NoNeedNowwrite(buffer, ETHIO_DESTINATION_PORT, 0x0000b798); // Listen port for
100  // ethio stuff
101 
102  setPacketSizeStripCSR(6);
103  setExternalBCOClockSourceStripCSR(source); //(source)
104  communicationFirmwareInstance_->write(
105  buffer, STRIP_CSR, stripCSRRegisterValue_); // Reset CSR - reset trigger
106  // counter, external 27 MHz clock
107 
108  resetDCM(buffer);
109  // alignReadOut(buffer,0x3000);//0x3000
110 
111  setFrequencyFromClockState(buffer, frequency);
112  communicationFirmwareInstance_->write(
113  buffer, STRIP_CSR, stripCSRRegisterValue_, false /*clearBuffer*/);
114 
115  resetDCM(buffer);
116  // std::cout << __COUT_HDR_FL__ << "stripCSRRegisterValue :" << std::hex <<
117  // stripCSRRegisterValue_ << std::dec << std::endl;
118 
119  return buffer;
120 }
121 
122 //========================================================================================================================
123 void FSSRFirmwareBase::resetDCM(std::string& buffer)
124 {
125  // 31 DCM_RESET
126  resetDCMStripCSR(true); // Set bit 31
127  communicationFirmwareInstance_->write(buffer,
128  STRIP_CSR,
129  stripCSRRegisterValue_,
130  false /*clearBuffer*/); // Set reset to DCM
131 
132  resetDCMStripCSR(false); // unset bit 31
133  communicationFirmwareInstance_->write(buffer,
134  STRIP_CSR,
135  stripCSRRegisterValue_,
136  false /*clearBuffer*/); // Clear reset to DCM
137 
138  // 2018-10-24 Lorenzo in OtsUDPFirmware is doing nothing so I am commenting it out
139  // communicationFirmwareInstance_->waitClear(buffer, STRIP_CSR,
140  // waitDCMResetStripCSR(),false/*clearBuffer*/); // Wait for DCM to lock
141 }
142 
143 //========================================================================================================================
144 void FSSRFirmwareBase::alignReadOut(std::string& buffer,
145  unsigned int sensor,
146  unsigned int chip)
147 {
148  //(2:0) sensor
149  //(7:3) chip
150  // 28 up/down (-> here we always move up)
151  // 31 must be set 1
152  // It shifts the readout every time is called by few picosends (likely) if bit 31 is
153  // set
154  communicationFirmwareInstance_->write(
155  buffer,
156  STRIP_TRIM_CSR,
157  (0x9 << 28) + ((chip & 0xf) << 3) +
158  (sensor & 0x7)); // MCLKB edge for channel 5 // was 0x00002000
159 }
160 //========================================================================================================================
161 std::string FSSRFirmwareBase::resetDetector(int channel)
162 {
163  // std::cout << __COUT_HDR_FL__ << "Resetting detector!" << std::endl;
164  // Byte 4-------------------
165  // 31 CHIP_RESET
166  // 30 CLEAR_FIFO
167  // 29 CLEAR_ERRORS
168  // 28 LINK_RESET
170  // 27 DAC_RESET
171  // 26 unused
172  // 25 unused
173  // 24 unused
174  // Byte 3-------------------
175  // 23-16 unused
176  // Byte 2-------------------
177  // 15-8 unused
178  // Byte 1-------------------
179  // 7-0 CHANNEL_MASK ->Reset signals are sent to all channels with bits set in
180  // CHANNEL_MASK field
181 
182  std::string buffer;
183  if(channel == -1) // reset all channels
184  {
185  // write(buffer,STRIP_RESET,0xd000003f); // Issue reset
186  communicationFirmwareInstance_->write(
187  buffer,
188  STRIP_RESET,
189  0xf000003f); // Issue reset // was 0xf000003f
190  // 2018-10-24 Lorenzo in OtsUDPFirmware is doing nothing so I am
191  // commenting it out
192  // communicationFirmwareInstance_->waitClear(buffer,
193  // STRIP_RESET, 0xf0000000); // Wait for reset to complete //
194  // was 0xf0000000
195  }
196  else
197  {
198  communicationFirmwareInstance_->write(
199  buffer,
200  STRIP_RESET,
201  0xf000003f); // Issue reset
202  // 2018-10-24 Lorenzo in OtsUDPFirmware is doing nothing so I am
203  // commenting it out
204  // communicationFirmwareInstance_->waitClear(buffer,
205  // STRIP_RESET, 0xf0000000); // Wait for reset to complete
206  }
207 
208  return buffer;
209 }
210 
211 //========================================================================================================================
212 std::string FSSRFirmwareBase::enableTrigger(void)
213 {
214  std::string buffer;
215  // std::cout << __COUT_HDR_FL__ << "Enabling Trigger!!!" << std::endl;
216  // std::cout << __COUT_HDR_FL__ << "stripCSRRegisterValue in :" << std::hex <<
217  // stripCSRRegisterValue_ << std::dec << std::endl;
218 
219  // setHaltStripCSR(1);//WARNING THIS IS CLEARED BY THE MASTER BUT IF THERE IS NO
220  // MASTER NOTHING WORKS UNLESS THE BIT IS UNSET
221  sendTriggerDataStripCSR(false); // STRIP_CSR -> Bit 24 -> SEND_TRIG
222  communicationFirmwareInstance_->write(
223  buffer, STRIP_CSR, stripCSRRegisterValue_, false /*clearBuffer*/);
224  resetTriggerCounterStripCSR(buffer);
225  sendTriggerDataStripCSR(true); // STRIP_CSR -> Bit 24 -> SEND_TRIG
226  sendTriggerNumberStripCSR(true); // STRIP_CSR -> Bit 25 -> SEND_TRIGNUM
227  sendBCOStripCSR(true); // STRIP_CSR -> Bit 26 -> SEND_BCO
228  communicationFirmwareInstance_->write(
229  buffer, STRIP_CSR, stripCSRRegisterValue_, false /*clearBuffer*/);
230 
231  stripTriggerCSRRegisterValue_ = 0;
232  BCOOffset(4);
233  communicationFirmwareInstance_->write(
234  buffer,
235  STRIP_TRIG_CSR,
236  stripTriggerCSRRegisterValue_,
237  false /*clearBuffer*/); // BCO offset // was 0x00000004
238 
239  // write(buffer,STRIP_TRIG_INPUT_0,0x1f060040); // FSSR GOTHIT trigger input -
240  // timed in for the 27 MHz external clock
241  // write(buffer,STRIP_TRIG_INPUT_3,0x3f874040); // Unbiased trigger input +
242  // external trigger
243 
244  configureStripTriggerUnbiased(buffer);
245 
246  configureTriggerInputs(buffer);
247 
248  // FIXME for IP .36 the number to set is 0x20401000
249 
250  // if (1 || communicationFirmwareInstance_->getVersion() == 1)
251  communicationFirmwareInstance_->write(
252  buffer, STRIP_TRIG_INPUT_3, 0x20401000, false /*clearBuffer*/);
253  // else if (communicationFirmwareInstance_->getVersion() == 2)
254  // communicationFirmwareInstance_->write(buffer, STRIP_TRIG_INPUT_3, 0x20301000,
255  // false/*clearBuffer*/); else
256  //{
257  // __SS__ << "what version is this?" << communicationFirmwareInstance_->getVersion()
258  //<< std::endl;
259  // __COUT__ << ss.str();
260  // __SS_THROW__;
261  //}
262  // std::cout << __COUT_HDR_FL__ << "stripCSRRegisterValue out:" << std::hex <<
263  // stripCSRRegisterValue_ << std::dec << std::endl; std::cout << __COUT_HDR_FL__ <<
264  // "Done enabling Trigger!!!" << std::endl;
265 
266  return buffer;
267 }
268 //
270 // void FSSRFirmwareBase::setDataDestination(std::string& buffer, const std::string& ip,
271 // const uint16_t port)
273 //{
274 // std::cout << __COUT_HDR_FL__ << "Set data destination!" << std::endl;
275 //
276 // struct sockaddr_in socketAddress;
277 // inet_pton(AF_INET, ip.c_str(), &(socketAddress.sin_addr));
278 // std::cout << __COUT_HDR_FL__ << "ADDRESS: " << std::hex <<
279 // ntohl(socketAddress.sin_addr.s_addr) << std::dec << std::endl;
280 // communicationFirmwareInstance_->write(buffer, DATA_DESTINATION_IP,
281 // ntohl(socketAddress.sin_addr.s_addr)); // Set data destination IP 192.168.133.1
282 // std::cout << __COUT_HDR_FL__ << "PORT: " << std::hex << port << std::dec <<
283 // std::endl; communicationFirmwareInstance_->write(buffer,
284 // DATA_SOURCE_DESTINATION_PORT, port); // Set data destination port std::cout <<
285 // __COUT_HDR_FL__ << "THIS IS THE BUFFER: " << buffer << std::endl;
286 //
287 // for(uint32_t i=0; i<buffer.size(); i++)
288 // printf("%2.2X-",(uint8_t)buffer[i]);
289 // std::cout << std::dec << std::endl;
290 //
291 //}
292 
293 //========================================================================================================================
294 std::string FSSRFirmwareBase::resetBCO(void)
295 {
296  std::cout << __COUT_HDR_PL__ << "Reset BCO!!!" << std::endl;
297  std::cout << __COUT_HDR_FL__ << "stripCSRRegisterValue in :" << std::hex
298  << stripCSRRegisterValue_ << std::dec << std::endl;
299  std::string buffer;
300 
301  // resetTriggerCounterStripCSR(buffer);
302  // write(buffer, STRIP_CSR, stripCSRRegisterValue_);//the write is done in the reset
303  // std::cout << __COUT_HDR_PL__ << "stripCSRRegisterValue :" << std::hex <<
304  // stripCSRRegisterValue_ << std::dec << std::endl;
305 
306  // msg->Write(STRIP_SC_CSR,0x90000b95|(chmask<<16));
307 
308  // Byte 4-------------------
309  // 31 SC_BUSY
310  // 30 RAW
311  // 29 BCO_SYNC
312  // 28 BCO_ZERO
314  // 27 unused
315  // 26-24 LENGTH
316  // Byte 3-------------------
317  // 23-16 CHANNEL_MASK
318  // Byte 2-------------------
319  // 15-13 READ_SELECT
320  // 12-10 INSTRUCTION
321  // 9-5 ADDRESS
322  // Byte 1-------------------
323  // 9-5 ADDRESS
324  // 4-0 CHIP_ID
325  // 0x 9 0 3 f 0 b 9 5
326  // 1001-0000-0011-1111-0000-1011-1001-0101
327  // CHIP_ID 1-0101 -> 21 wild chip id ->all chips will get the command
328  // ADDRESS 11-100 -> 28
329  // INSTRUCTION 010 -> 2
330  // READ_SELECT 000 -> 0
331  // CHANNEL_MASK 0011-1111 -> all Channels
332  // LENGTH 000 -> 0
333  // unused
334  // BCO_SYNC 1
335  // BCO_ZERO 0
336  // RAW 0
337  // SC_BUSY 1
338  // When BCO SYNC is set the transaction is delayed until the internal BCO counter has
339  // a value of 240. This allow the AqBCO command to be synchronized
340  communicationFirmwareInstance_->write(
341  buffer, STRIP_SC_CSR, 0x903f0b95, false /*clearBuffer*/); // This is the
342  // <SCR,set> command
343  // with the bit set to
344  // sync SHIFT with
345  // BCO=0.
346 
347  // enableBCOStripCSR(true);
348  // communicationFirmwareInstance_->write(buffer, STRIP_CSR, stripCSRRegisterValue_);
349 
350  std::cout << __COUT_HDR_PL__ << "stripCSRRegisterValue out:" << std::hex
351  << stripCSRRegisterValue_ << std::dec << std::endl;
352  std::cout << __COUT_HDR_FL__ << "Done reset BCO!!!" << std::endl;
353 
354  return buffer;
355 }
356 
357 //========================================================================================================================
358 std::string FSSRFirmwareBase::armBCOReset(void)
359 {
360  std::string buffer;
361  armBCOResetCSR();
362  communicationFirmwareInstance_->write(buffer, STRIP_CSR, stripCSRRegisterValue_);
363  return buffer;
364 }
365 
366 //========================================================================================================================
367 std::string FSSRFirmwareBase::startStream(bool channel0,
368  bool channel1,
369  bool channel2,
370  bool channel3,
371  bool channel4,
372  bool channel5)
373 {
374  // std::cout << __COUT_HDR_FL__ << "Start Stream!" << std::endl;
375  // std::cout << __COUT_HDR_PL__ << "stripCSRRegisterValue in:" << std::hex <<
376  // stripCSRRegisterValue_ << std::dec << std::endl;
377  std::string buffer;
378 
379  // std::cout << __COUT_HDR_PL__ << " channel0 " << channel0 << " channel1 " <<
380  // channel1 << " channel2 " << channel2 << " channel3 " << channel3 << " channel4 " <<
381  // channel4 << " channel5 " << channel5 << std::endl;
382 
383  enableChannelsStripCSR(channel0, channel1, channel2, channel3, channel4, channel5);
384  // if (version_ == 1)
385  // enableChannelsStripCSR(true, true, true, true, false, false);
386  // else if (version_ == 2)
387  // enableChannelsStripCSR(true, true, true, true, true, true);
388 
389  enableStreamStripCSR(
390  true); // Turn on streaming hits along with BCO data // was 0x0f000f30
391  communicationFirmwareInstance_->write(buffer, STRIP_CSR, stripCSRRegisterValue_);
392 
393  // std::cout << __COUT_HDR_PL__ << "stripCSRRegisterValue out:" << std::hex <<
394  // stripCSRRegisterValue_ << std::dec << std::endl; std::cout << __COUT_HDR_PL__
395  // << "Done start Stream!" << std::endl;
396 
397  return buffer;
398 }
399 
400 //========================================================================================================================
401 std::string FSSRFirmwareBase::stopStream(void)
402 {
403  std::string buffer;
404  enableStreamStripCSR(false);
405  enableChannelsStripCSR(false, false, false, false, false, false);
406  communicationFirmwareInstance_->write(buffer, STRIP_CSR, stripCSRRegisterValue_);
407  return buffer;
408 }
409 
410 //========================================================================================================================
411 void FSSRFirmwareBase::makeDACSequence(FirmwareSequence<uint64_t>& sequence,
412  unsigned int channel,
413  const ROCStream& rocStream)
414 {
415  const ROCDACs& rocDACs = rocStream.getROCDACs();
416  for(DACList::const_iterator it = rocDACs.getDACList().begin();
417  it != rocDACs.getDACList().end();
418  it++)
419  {
420  // if(it->first != "SendData" && it->first != "RejectHits") continue;
421  uint64_t data = FSSRROCDefinitions::makeDACWriteCommand(
422  rocStream.getFEWROCAddress(), it->first, it->second.second);
423  sequence.pushBack(ChannelFIFOAddress[channel], data);
424  sequence.pushBack(ChannelFIFOAddress[channel],
425  BitManipulator::insertBits(data, (uint64_t)0x48, 56, 8));
426  // set WRITE
427  sequence.pushBack(ChannelFIFOAddress[channel],
428  BitManipulator::insertBits(data, (uint64_t)1, 60, 1));
429  // clr WRITE
430  sequence.pushBack(ChannelFIFOAddress[channel],
431  BitManipulator::insertBits(data, (uint64_t)0, 60, 1));
432  // clr TALK
433  sequence.pushBack(ChannelFIFOAddress[channel],
434  BitManipulator::insertBits(data, (uint64_t)0, 62, 1));
435  sequence.pushBack(ChannelFIFOAddress[channel],
436  BitManipulator::insertBits(data, (uint64_t)0x40, 56, 8));
437  // break;
438  }
439 }
440 
441 //========================================================================================================================
442 void FSSRFirmwareBase::makeDACSequence(FirmwareSequence<uint32_t>& sequence,
443  unsigned int channel,
444  const ROCStream& rocStream)
445 {
446  const ROCDACs& rocDACs = rocStream.getROCDACs();
447  for(DACList::const_iterator it = rocDACs.getDACList().begin();
448  it != rocDACs.getDACList().end();
449  it++)
450  {
451  /*RYAN
452  //if(it->first != "SendData" && it->first != "RejectHits") continue;
453  uint64_t data =
454  FSSRROCDefinitions::makeDACWriteCommand(rocStream.getFEWROCAddress(), it->first,
455  it->second.second); sequence.pushBack(ChannelFIFOAddress[channel], data);
456  sequence.pushBack(ChannelFIFOAddress[channel],
457  BitManipulator::insertBits(data,(uint32_t)0x48,56,8));
458  //set WRITE
459  sequence.pushBack(ChannelFIFOAddress[channel],
460  BitManipulator::insertBits(data,(uint32_t)1,60,1));
461  //clr WRITE
462  sequence.pushBack(ChannelFIFOAddress[channel],
463  BitManipulator::insertBits(data,(uint32_t)0,60,1));
464  //clr TALK
465  sequence.pushBack(ChannelFIFOAddress[channel],
466  BitManipulator::insertBits(data,(uint32_t)0,62,1));
467  sequence.pushBack(ChannelFIFOAddress[channel],
468  BitManipulator::insertBits(data,(uint32_t)0x40,56,8));
469  */
470 
471  // if(it->first != "SendData" && it->first != "RejectHits") continue;
472  uint32_t data = FSSRROCDefinitions::makeDACWriteHeader(
473  rocStream.getFEWROCAddress(), it->first);
474  // Insert channel
475  BitManipulator::insertBits(data, 1, 16 + channel, 1);
476  sequence.pushBack(ChannelFIFOAddress[channel], it->second.second);
477  std::cout << __COUT_HDR_FL__ << "Register: " << it->first
478  << " value: " << it->second.second << std::hex << " -> Data: " << data
479  << std::dec << std::endl;
480  sequence.pushBack(STRIP_SC_CSR, data);
481  }
482 }
483 
484 //========================================================================================================================
485 void FSSRFirmwareBase::makeDACBuffer(std::string& buffer,
486  unsigned int channel,
487  const ROCStream& rocStream)
488 {
489  std::cout << __COUT_HDR_FL__ << "Channel: " << channel << std::endl;
490  std::cout << __COUT_HDR_FL__ << "BufferINsize: " << buffer.size() << std::endl;
491  const ROCDACs& rocDACs = rocStream.getROCDACs();
492  // for (DACList::const_iterator it = rocDACs.getDACList().begin(); it !=
493  // rocDACs.getDACList().end(); it++)
494  // {
495  // std::string bufferElement;
496  // communicationFirmwareInstance_->waitClear(bufferElement, STRIP_SC_CSR,
497  // 0x80000000); uint32_t registerHeader = 0;
498  // //FIXME This must go in the FSSRROCDefinitions stuff
499  // //if (it->first != "RejectHits" && it->first != "SendData")
500  // if (it->first == "VTp0")
501  // {
502  // //communicationFirmwareInstance_->write(bufferElement,
503  // ChannelFIFOAddress[channel], it->second.second); registerHeader =
504  // FSSRROCDefinitions::makeDACReadHeader(rocStream.getFEWROCAddress(), it->first);
505  // //Insert channel
506  // BitManipulator::insertBits(registerHeader, 1, 16 + channel, 1);
526  //
527  // std::cout << __COUT_HDR_FL__ << "Register: " << it->first << " value: " <<
528  // it->second.second << std::hex << " -> Data: " << registerHeader << std::dec <<
529  // std::endl; communicationFirmwareInstance_->write(bufferElement, STRIP_SC_CSR,
530  // registerHeader); communicationFirmwareInstance_->waitClear(bufferElement,
531  // STRIP_SC_CSR, 0x80000000);
532  //
533  // //buffer.push_back(bufferElement);
534  // buffer += bufferElement;
535  // }
536  // //break;
537  // }
538  for(DACList::const_iterator it = rocDACs.getDACList().begin();
539  it != rocDACs.getDACList().end();
540  it++)
541  {
542  std::string bufferElement;
543  communicationFirmwareInstance_->waitClear(
544  bufferElement, STRIP_SC_CSR, 0x80000000, false);
545  uint32_t registerHeader = 0;
546  // FIXME This must go in the FSSRROCDefinitions stuff
547  if(it->first != "RejectHits" && it->first != "SendData")
548  {
549  communicationFirmwareInstance_->write(
550  bufferElement, ChannelFIFOAddress[channel], it->second.second, false);
551  registerHeader = FSSRROCDefinitions::makeDACWriteHeader(
552  rocStream.getFEWROCAddress(), it->first);
553  // Insert channel
554  BitManipulator::insertBits(registerHeader, 1, 16 + channel, 1);
555  }
556  else
557  {
558  if(it->second.second == 1 || it->second.second == 2)
559  {
560  registerHeader = FSSRROCDefinitions::makeDACSetHeader(
561  rocStream.getFEWROCAddress(), it->first);
562  // Insert channel
563  BitManipulator::insertBits(registerHeader, 1, 16 + channel, 1);
564  }
565  else if(it->second.second == 0 || it->second.second == 5)
566  {
567  registerHeader = FSSRROCDefinitions::makeDACResetHeader(
568  rocStream.getFEWROCAddress(), it->first);
569  // Insert channel
570  BitManipulator::insertBits(registerHeader, 1, 16 + channel, 1);
571  }
572  else
573  std::cout << __COUT_HDR_FL__ << "Register value for : " << it->first
574  << " doesn't have a value I expect -> value = "
575  << it->second.second << std::endl;
576  }
577 
578  // std::cout << __COUT_HDR_FL__ << "Register: " << it->first << " value: " <<
579  // it->second.second << std::hex << " -> Data: " << registerHeader << std::dec <<
580  // std::endl;
581  communicationFirmwareInstance_->write(
582  bufferElement, STRIP_SC_CSR, registerHeader, false);
583  communicationFirmwareInstance_->waitClear(
584  bufferElement, STRIP_SC_CSR, 0x80000000, false);
585 
586  // buffer.push_back(bufferElement);
587  buffer += bufferElement;
588  // break;
589  }
590  std::cout << __COUT_HDR_FL__ << "BufferOUTsize: " << buffer.size() << std::endl;
591 }
592 
593 //========================================================================================================================
594 void FSSRFirmwareBase::makeDACBuffer(std::vector<std::string>& buffer,
595  unsigned int channel,
596  const ROCStream& rocStream)
597 {
598  // std::cout << __COUT_HDR_FL__ << "\tMaking DAC Buffer" << std::endl;
599 
600  int limitCount = 0;
601  unsigned int singleVectorCount = 0;
602 
603  std::string alternateBuffer;
604 
605  // std::cout << __COUT_HDR_FL__ << "Channel: " << channel << std::endl;
606  const ROCDACs& rocDACs = rocStream.getROCDACs();
607  // std::cout << __COUT_HDR_FL__ << "Number of DACs: " << rocDACs.getDACList().size()
608  // << std::endl;
609  std::string bufferElement;
610  // FIXME My
611  // for (const auto it: rocDACs.getDACList())
612  for(const std::pair<std::string, std::pair<unsigned int, unsigned int> >& it :
613  rocDACs.getDACList())
614  // for (std::map<std::string, std::pair<unsigned int, unsigned int> >::const_iterator
615  // it = rocDACs.getDACList().begin(); it != rocDACs.getDACList().end(); it++)
616  {
617  // std::cout << __COUT_HDR_FL__ << "Register?" << std::endl;
618  // if (it.first != "ActiveLines") continue;
619  // std::cout << __COUT_HDR_FL__ << "Register-1: " << it->first << " val: " <<
620  // it->second.first << " = " << it->second.second << std::endl;
621  communicationFirmwareInstance_->waitClear(
622  bufferElement, STRIP_SC_CSR, 0x80000000, false);
623  uint32_t registerHeader = 0;
624  // FIXME This must go in the FSSRROCDefinitions stuff
625  // std::cout << __COUT_HDR_FL__ << "Register0: " << it.first << std::endl;
626  if(it.first != "RejectHits" && it.first != "SendData")
627  {
628  // std::cout << __COUT_HDR_FL__ << "Register1: " << it.first << "Channel: " <<
629  // channel << " fifo address: " << ChannelFIFOAddress[channel] << std::endl;
630  communicationFirmwareInstance_->write(
631  bufferElement, ChannelFIFOAddress[channel], it.second.second, false);
632  registerHeader = FSSRROCDefinitions::makeDACWriteHeader(
633  rocStream.getFEWROCAddress(), it.first);
634  // Insert channel
635  BitManipulator::insertBits(registerHeader, 1, 16 + channel, 1);
636  }
637  else
638  {
639  // std::cout << __COUT_HDR_FL__ << "Register2: " << it.first << std::endl;
640  if(it.second.second == 1 || it.second.second == 2)
641  {
642  registerHeader = FSSRROCDefinitions::makeDACSetHeader(
643  rocStream.getFEWROCAddress(), it.first);
644  // Insert channel
645  BitManipulator::insertBits(registerHeader, 1, 16 + channel, 1);
646  }
647  else if(it.second.second == 0 || it.second.second == 5)
648  {
649  registerHeader = FSSRROCDefinitions::makeDACResetHeader(
650  rocStream.getFEWROCAddress(), it.first);
651  // Insert channel
652  BitManipulator::insertBits(registerHeader, 1, 16 + channel, 1);
653  }
654  else
655  std::cout << __COUT_HDR_FL__ << "Register value for : " << it.first
656  << " doesn't have a value I expect -> value = "
657  << it.second.second << std::endl;
658  }
659  // std::cout << __COUT_HDR_FL__ << "Register: " << it.first << " value: " <<
660  // it.second.second << std::hex << " -> Data: " << registerHeader << std::dec <<
661  // std::endl;
662  communicationFirmwareInstance_->write(
663  bufferElement, STRIP_SC_CSR, registerHeader, false);
664  communicationFirmwareInstance_->waitClear(
665  bufferElement, STRIP_SC_CSR, 0x80000000, false);
666 
667  // std::cout << __COUT_HDR_FL__ << "Register3: " << it.first << std::endl;
668  // alternateBuffer += bufferElement;
669  limitCount++;
670  singleVectorCount++;
671 
672  if(limitCount == STIB_DAC_WRITE_MAX)
673  {
674  std::cout << __COUT_HDR_FL__ << "\tBuffer length:" << bufferElement.size()
675  << std::endl;
676  buffer.push_back(bufferElement);
677  limitCount = 0;
678  bufferElement.clear();
679  }
680  else if(singleVectorCount ==
681  rocDACs.getDACList().size()) // case for incomplete packet
682  {
683  buffer.push_back(bufferElement);
684  }
685 
686  // buffer.push_back(bufferElement);
687  // break;
688  }
689  // std::cout << __COUT_HDR_FL__ << "\tDone making DAC Buffer" << std::endl;
690 }
691 
692 //========================================================================================================================
693 void FSSRFirmwareBase::makeMaskBuffer(std::string& buffer,
694  unsigned int channel,
695  const ROCStream& rocStream)
696 {
697  // std::cout << __COUT_HDR_FL__ << "Making mask! " << std::endl;
698  makeMaskBuffer(buffer, channel, rocStream, "Kill");
699  // makeMaskSequence(buffer, channel, rocStream, "Inject");
700 }
701 
702 //========================================================================================================================
703 void FSSRFirmwareBase::makeMaskBuffer(std::string& buffer,
704  unsigned int channel,
705  const ROCStream& rocStream,
706  const std::string& registerName)
707 {
708  int chipId = rocStream.getFEWROCAddress();
709  const std::string& mask = rocStream.getROCMask();
710  // std::cout << __COUT_HDR_FL__ << "\tMaking mask! Length = " << mask.length() <<
711  // std::endl; std::cout << __COUT_HDR_FL__ << "\tMask length: " << mask.length() <<
712  // std::endl; std::cout << __COUT_HDR_FL__ << "\tMask: " << mask << std::endl;
713 
714  unsigned int data[4] = {0, 0, 0, 0};
715 
716  char val;
717  // int j = 0;
718  for(unsigned int d = 0; d < 4; d++)
719  { // d goes from 0 to 4. 4 bytes
720  // std::cout << __COUT_HDR_FL__ << "---------------------" << d <<
721  // "-------------------" << std::endl;
722  for(unsigned int m = 0; m < 8 * 4; m++)
723  { // m goes from 0 to 31, since each byte has 8 bits, there are 32 bits
724  val = mask[(8 * 4 * d) + m]; // assigns to val the value of the corresponding
725  // bit. 0-31, 32-63, 64-95, 96-127. it goes
726  // through each of the 128 bits
727  // std::cout << __COUT_HDR_FL__ << "---------------------" << j++ <<
728  // std::endl; std::cout << __COUT_HDR_FL__ << "data[" << d << "] before: " <<
729  // std::hex << data[d] << std::dec << std::endl;
730  data[d] |= (unsigned int)atoi(&val) << (8 * 4 - 1 - m);
731  // std::cout << __COUT_HDR_FL__ << "(unsigned int) atoi(&val): " << (unsigned
732  // int) atoi(&val) << std::endl; std::cout << __COUT_HDR_FL__ << "data[" << d
733  // << "] after: " << std::hex << data[d] << std::dec << std::endl; std::cout
734  // <<
735  // __COUT_HDR_FL__ << std::hex << "D: " << data[d] << " Val: " << (unsigned
736  // int)atoi(&val) << " index: " << std::dec << (8*4-1-m) << " bit: " <<
737  // mask[(8*4*d)+m] << std::dec << std::endl;
738  }
739  //
740  }
741 
742  int i;
743  unsigned int w;
744  unsigned char len = 4;
745  unsigned char addr = 17; // Kill
746  unsigned char bitMask = 1 << channel;
747  unsigned char inst = WRITE;
748 
749  communicationFirmwareInstance_->waitClear(buffer, STRIP_SC_CSR, 0x80000000, false);
750 
751  for(i = 0; i < 4; i++)
752  // write(buffer, STRIP_SCI + 4 * i, data[i]);
753  communicationFirmwareInstance_->write(
754  buffer, STRIP_SCI + 4 * (4 - i - 1), data[i], false);
755 
756  w = 0x80000000 | (len << 24) | (bitMask << 16) | (inst << 10) | (addr << 5) | chipId;
757 
758  communicationFirmwareInstance_->write(buffer, STRIP_SC_CSR, w, false);
759 
760  communicationFirmwareInstance_->waitClear(buffer, STRIP_SC_CSR, 0x80000000, false);
761 }
762 
763 //========================================================================================================================
764 void FSSRFirmwareBase::makeMaskSequence(FirmwareSequence<uint64_t>& sequence,
765  unsigned int channel,
766  const ROCStream& rocStream)
767 {
768  std::cout << __COUT_HDR_FL__ << "Making mask! " << std::endl;
769  makeMaskSequence(sequence, channel, rocStream, "Kill");
770  // makeMaskSequence(sequence, channel, rocStream, "Inject");
771 }
772 
773 //========================================================================================================================
774 void FSSRFirmwareBase::makeMaskSequence(FirmwareSequence<uint32_t>& sequence,
775  unsigned int channel,
776  const ROCStream& rocStream)
777 {
778  std::cout << __COUT_HDR_FL__ << "Making mask! " << std::endl;
779  makeMaskSequence(sequence, channel, rocStream, "Kill");
780  // makeMaskSequence(channel,rocStream,sequence,"Inject");
781 }
782 
783 //========================================================================================================================
784 void FSSRFirmwareBase::makeMaskSequence(FirmwareSequence<uint64_t>& sequence,
785  unsigned int channel,
786  const ROCStream& rocStream,
787  const std::string& registerName)
788 {
789  int chipId = rocStream.getFEWROCAddress(); // 9, 14 or 21 bcast
790  std::string mask = rocStream.getROCMask();
791  std::cout << __COUT_HDR_FL__ << "Mask length: " << mask.length() << std::endl;
792 
793  uint64_t uInt64Data = 0;
794  std::string stringData = "";
795 
796  // have to manually set every bit for mask writes.
797  // reset fifo
798  // download every bit (shift_in and shift_ctrl) to fifo (setup muxes and control
799  // lines) configure muxes for readout commence readout
800 
801  // FIFO Controls - byte 5 (7:0)
802  // 7 - FIFO Clock
803  // 6 - Shift Ctrl bit
804  // MASK_CELL_H - Shift In bit
805  // MUX Controls - byte 0 (7:0)
806  // 7 - Read En/Output MUX sel (1 for masks)
807  // 1 - Write En for mux
808  // 0 - Reset Fifo
809 
810  // reset fifo
811  BitManipulator::insertBits(uInt64Data, 0x1, 56, 8);
812  sequence.pushBack(ChannelFIFOAddress[channel], uInt64Data);
813 
814  // configure fifo for write
815  BitManipulator::insertBits(uInt64Data, 0x2, 56, 8);
816  sequence.pushBack(ChannelFIFOAddress[channel], uInt64Data);
817 
818  // Download every bit (shift_in and shift_control) to fifo (setup muxes and control
819  // lines) Bit 7 of data is FIFO clock, bit 6 is shift_control, bit 5 is shift_in
820  // start bits (ctrl 0, data 0 => ctrl 1, data 0)
821 
822  BitManipulator::insertBits(uInt64Data, 0x40, 16, 8); //(0<<7) | (1<<6) | (0<<5)
823  sequence.pushBack(ChannelFIFOAddress[channel], uInt64Data);
824  BitManipulator::insertBits(
825  uInt64Data,
826  0xc0,
827  16,
828  8); //(1<<7) | (1<<6) | (0<<5) -> clock the data in the fifo
829  sequence.pushBack(ChannelFIFOAddress[channel], uInt64Data);
830 
831  stringData = FSSRROCDefinitions::makeMaskWriteCommand(chipId, registerName, mask);
832 
833  uint8_t data;
834  for(unsigned int s = 0; s < stringData.length(); s++)
835  for(int b = 8 - 1; b >= 0 && (s * 8 + 8 - b < 13 + 128); b--)
836  {
837  // std::cout << __COUT_HDR_FL__ << "S: " << s << " val: " <<
838  // stringData.data()[s] << " b: " << b << " bit: " <<
839  // ((stringData.data()[s]>>b)&1) << std::endl;
840  data = 0x40 | (((stringData.data()[s] >> b) & 1) << 5);
841  BitManipulator::insertBits(uInt64Data, (uint64_t)data, 16, 8);
842  sequence.pushBack(ChannelFIFOAddress[channel], uInt64Data);
843  data |= 0x80;
844  BitManipulator::insertBits(uInt64Data, (uint64_t)data, 16, 8);
845  sequence.pushBack(ChannelFIFOAddress[channel], uInt64Data);
846  }
847 
848  // reset Shift Control
849  BitManipulator::insertBits(uInt64Data, 0x0, 16, 8);
850  sequence.pushBack(ChannelFIFOAddress[channel], uInt64Data);
851  BitManipulator::insertBits(uInt64Data, 0x80, 16, 8);
852  sequence.pushBack(ChannelFIFOAddress[channel], uInt64Data);
853 
854  // configure muxes for readout
855  BitManipulator::insertBits(uInt64Data, 0x0, 56, 8);
856  sequence.pushBack(ChannelFIFOAddress[channel], uInt64Data);
857 
858  // commence readout
859  BitManipulator::insertBits(uInt64Data, 0x80, 56, 8);
860  sequence.pushBack(ChannelFIFOAddress[channel], uInt64Data);
861 }
862 
863 //========================================================================================================================
864 void FSSRFirmwareBase::makeMaskSequence(FirmwareSequence<uint32_t>& sequence,
865  unsigned int channel,
866  const ROCStream& rocStream,
867  const std::string& registerName)
868 {
869 }
870 
871 //========================================================================================================================
872 std::string FSSRFirmwareBase::readCSRRegister()
873 {
874  std::string buffer;
875  // std::cout << __COUT_HDR_FL__ << "FSSR readCSRRegister" << std::endl;
876  communicationFirmwareInstance_->read(buffer, STRIP_CSR);
877  return buffer;
878 }
879 
880 //========================================================================================================================
881 std::string FSSRFirmwareBase::readSCCSRRegister()
882 {
883  std::string buffer;
884  std::cout << __COUT_HDR_FL__ << "FSSR readCSRRegister" << std::endl;
885  communicationFirmwareInstance_->read(buffer, STRIP_SC_CSR);
886  return buffer;
887 }
888 
889 //========================================================================================================================
890 void FSSRFirmwareBase::setFrequencyFromClockState(std::string& buffer, double frequency)
891 {
892  // std::cout << __COUT_HDR_FL__ << "Setting up clock frequency!!!" << std::endl;
893 
894  int quotient;
895  int numerator;
896  int denominator;
897  double realClockFrequency;
898 
899  if(BitManipulator::readBits(stripCSRRegisterValue_, 17, 1) ==
900  1) // if fastBCO is enabled
901  quotient = 4;
902  else // normal cases
903  quotient = 8;
904 
905  if(isClockStateExternal()) // base freq: 54MHz
906  {
907  realClockFrequency =
908  EXTERNAL_CLOCK_FREQUENCY / quotient; // this is the REAL frequency being used
909  }
910  else // base freq: 66.667MHz
911  {
912  realClockFrequency =
913  INTERNAL_CLOCK_FREQUENCY / quotient; // this is the REAL frequency being used
914  }
915 
916  double factor = frequency / realClockFrequency;
917 
918  // The device needs the denominator and the denominator to be load into a 5 bit
919  // register It will take two initial numerator and denominator bigger than necessary
920  // (to do not loose precision) and divide them for their gcd. If they still do not
921  // fit in 5 bit, they are trunked (divided by 2) untill they are less than 32
922  numerator =
923  factor * 100; // we will work with 2 digits precision after the decimal point
924  denominator = 100;
925 
926  do
927  {
928  // We will need the GCD at some point in order to simplify fractions //taken from
929  // other sources
930  int gcd = numerator;
931  int rest = denominator;
932  int tmp;
933 
934  while(rest != 0)
935  {
936  tmp = rest;
937  rest = gcd % tmp;
938  gcd = tmp;
939  }
940  // Done finding the GCD
941 
942  if(gcd == 1) // if there's no GCD, just divide by 2 to find the nearest
943  // approximation with less bits
944  {
945  numerator /= 2;
946  denominator /= 2;
947  }
948  else
949  {
950  numerator /= gcd;
951  denominator /= gcd;
952  }
953 
954  } while(denominator >= 32 || numerator >= 32);
955 
956  // numerator = 2;
957  // denominator = 1;
958  // std::cout << __COUT_HDR_FL__ << "Numerator: " << numerator << std::endl;
959  // std::cout << __COUT_HDR_FL__ << "Denominator: " << denominator << std::endl;
960  setFrequencyRatio(buffer, numerator, denominator);
961  // std::cout << __COUT_HDR_FL__ << "Done with clock frequency setup!!!" << std::endl;
962 }
963 //========================================================================================================================
964 bool FSSRFirmwareBase::isClockStateExternal() // returns true if the clock state is
965  // External
966 {
967  if(BitManipulator::readBits(stripCSRRegisterValue_, 16, 1) == 1)
968  return true;
969  else
970  return false;
971 }
972 
973 //========================================================================================================================
974 void FSSRFirmwareBase::setCSRRegister(uint32_t total) { stripCSRRegisterValue_ = total; }
975 
976 //========================================================================================================================
977 void FSSRFirmwareBase::setPacketSizeStripCSR(uint32_t size)
978 {
979  if(size > 31)
980  std::cout << __COUT_HDR_FL__
981  << "ERROR: Maximum packet size is 31 while here you are trying to set "
982  << size << " packets!" << std::endl;
983  BitManipulator::insertBits(stripCSRRegisterValue_, size, 3, 5);
984  // write(buffer,STRIP_CSR, stripSCRRegisterValue_);
985 }
986 
987 //========================================================================================================================
988 void FSSRFirmwareBase::enableChannelsStripCSR(bool channel0,
989  bool channel1,
990  bool channel2,
991  bool channel3,
992  bool channel4,
993  bool channel5)
994 {
995  BitManipulator::insertBits(stripCSRRegisterValue_,
996  ((uint32_t)channel0) + ((uint32_t)channel1 << 1) +
997  ((uint32_t)channel2 << 2) + ((uint32_t)channel3 << 3) +
998  ((uint32_t)channel4 << 4) + ((uint32_t)channel5 << 5),
999  8,
1000  6);
1001 }
1002 
1003 //========================================================================================================================
1004 void FSSRFirmwareBase::setExternalBCOClockSourceStripCSR(std::string clockSource)
1005 {
1006  if(clockSource == "External")
1007  BitManipulator::insertBits(stripCSRRegisterValue_, 1, 16, 1);
1008  else if(clockSource == "Internal")
1009  BitManipulator::insertBits(stripCSRRegisterValue_, 0, 16, 1);
1010 }
1011 
1012 //========================================================================================================================
1013 // void FSSRFirmwareBase::setHaltStripCSR(bool set)
1014 //{
1015 // BitManipulator::insertBits(stripCSRRegisterValue_, (uint32_t) set, 17, 1);
1016 //}
1017 
1018 //========================================================================================================================
1019 void FSSRFirmwareBase::armBCOResetCSR(void)
1020 {
1021  BitManipulator::insertBits(stripCSRRegisterValue_, 1, 19, 1);
1022 }
1023 
1024 //========================================================================================================================
1025 void FSSRFirmwareBase::flushBuffersStripCSR(void)
1026 {
1027  BitManipulator::insertBits(stripCSRRegisterValue_, 1, 20, 1);
1028 }
1029 
1030 //========================================================================================================================
1031 void FSSRFirmwareBase::resetTriggerCounterStripCSR(std::string& buffer)
1032 {
1033  // Ryan's firmware is too fast so I need to make sure he understand the 1!!!!
1034  BitManipulator::insertBits(stripCSRRegisterValue_, 1, 21, 1);
1035  communicationFirmwareInstance_->write(
1036  buffer, STRIP_CSR, stripCSRRegisterValue_, false /*clearBuffer*/);
1037  BitManipulator::insertBits(stripCSRRegisterValue_, 1, 21, 1);
1038  communicationFirmwareInstance_->write(
1039  buffer, STRIP_CSR, stripCSRRegisterValue_, false /*clearBuffer*/);
1040  BitManipulator::insertBits(stripCSRRegisterValue_, 1, 21, 1);
1041  communicationFirmwareInstance_->write(
1042  buffer, STRIP_CSR, stripCSRRegisterValue_, false /*clearBuffer*/);
1043  BitManipulator::insertBits(stripCSRRegisterValue_, 1, 21, 1);
1044  communicationFirmwareInstance_->write(
1045  buffer, STRIP_CSR, stripCSRRegisterValue_, false /*clearBuffer*/);
1046  BitManipulator::insertBits(stripCSRRegisterValue_, 1, 21, 1);
1047  communicationFirmwareInstance_->write(
1048  buffer, STRIP_CSR, stripCSRRegisterValue_, false /*clearBuffer*/);
1049 
1050  BitManipulator::insertBits(stripCSRRegisterValue_, 0, 21, 1);
1051  communicationFirmwareInstance_->write(
1052  buffer, STRIP_CSR, stripCSRRegisterValue_, false /*clearBuffer*/);
1053 }
1054 
1055 //========================================================================================================================
1056 void FSSRFirmwareBase::resetBCOCounterStripCSR(void)
1057 {
1058  BitManipulator::insertBits(stripCSRRegisterValue_, 1, 22, 1);
1059 }
1060 
1061 //========================================================================================================================
1062 void FSSRFirmwareBase::enableTriggerStripCSR(bool enable)
1063 {
1064  BitManipulator::insertBits(stripCSRRegisterValue_, (uint32_t)enable, 23, 1);
1065 }
1066 
1067 //========================================================================================================================
1068 void FSSRFirmwareBase::sendTriggerDataStripCSR(bool send)
1069 {
1070  BitManipulator::insertBits(stripCSRRegisterValue_, (uint32_t)send, 24, 1);
1071 }
1072 
1073 //========================================================================================================================
1074 void FSSRFirmwareBase::sendTriggerNumberStripCSR(bool send)
1075 {
1076  BitManipulator::insertBits(stripCSRRegisterValue_, (uint32_t)send, 25, 1);
1077 }
1078 
1079 //========================================================================================================================
1080 void FSSRFirmwareBase::sendBCOStripCSR(bool send)
1081 {
1082  BitManipulator::insertBits(stripCSRRegisterValue_, (uint32_t)send, 26, 1);
1083 }
1084 
1085 //========================================================================================================================
1086 void FSSRFirmwareBase::enableStreamStripCSR(bool enable)
1087 {
1088  BitManipulator::insertBits(stripCSRRegisterValue_, (uint32_t)enable, 27, 1);
1089 }
1090 
1091 //========================================================================================================================
1092 void FSSRFirmwareBase::resetDCMStripCSR(bool clear)
1093 {
1094  BitManipulator::insertBits(stripCSRRegisterValue_, (uint32_t)clear, 31, 1);
1095 }
1096 
1097 //========================================================================================================================
1098 uint32_t FSSRFirmwareBase::waitDCMResetStripCSR(void)
1099 {
1100  uint32_t bitToCheck = 0;
1101  BitManipulator::insertBits(bitToCheck, 1, 31, 2);
1102  return bitToCheck;
1103 }
1104 
1105 //========================================================================================================================
1106 void FSSRFirmwareBase::resetDAC(void)
1107 {
1108  BitManipulator::insertBits(stripResetRegisterValue_, 1, 27, 1);
1109 }
1110 
1111 //========================================================================================================================
1112 void FSSRFirmwareBase::resetLink(bool channel0,
1113  bool channel1,
1114  bool channel2,
1115  bool channel3,
1116  bool channel4,
1117  bool channel5)
1118 {
1119  stripResetRegisterValue_ = 0;
1120  BitManipulator::insertBits(stripResetRegisterValue_,
1121  ((uint32_t)channel0) + ((uint32_t)channel1 << 1) +
1122  ((uint32_t)channel2 << 2) + ((uint32_t)channel3 << 3) +
1123  ((uint32_t)channel4 << 4) + ((uint32_t)channel5 << 5),
1124  0,
1125  6);
1126  BitManipulator::insertBits(stripResetRegisterValue_, 1, 29, 1);
1127  /*
1128  write(buffer, STRIP_RESET, (1<<28) +
1129  ((uint32_t)channel0) +
1130  ((uint32_t)channel1<<1) +
1131  ((uint32_t)channel2<<2) +
1132  ((uint32_t)channel3<<3) +
1133  ((uint32_t)channel4<<4) +
1134  ((uint32_t)channel5<<5)
1135  );
1136  */
1137 }
1138 
1139 //========================================================================================================================
1140 void FSSRFirmwareBase::clearErrors(bool channel0,
1141  bool channel1,
1142  bool channel2,
1143  bool channel3,
1144  bool channel4,
1145  bool channel5)
1146 {
1147  stripResetRegisterValue_ = 0;
1148  BitManipulator::insertBits(stripResetRegisterValue_,
1149  ((uint32_t)channel0) + ((uint32_t)channel1 << 1) +
1150  ((uint32_t)channel2 << 2) + ((uint32_t)channel3 << 3) +
1151  ((uint32_t)channel4 << 4) + ((uint32_t)channel5 << 5),
1152  0,
1153  6);
1154  BitManipulator::insertBits(stripResetRegisterValue_, 1, 29, 1);
1155 }
1156 
1157 //========================================================================================================================
1158 void FSSRFirmwareBase::clearFIFO(bool channel0,
1159  bool channel1,
1160  bool channel2,
1161  bool channel3,
1162  bool channel4,
1163  bool channel5)
1164 {
1165  stripResetRegisterValue_ = 0;
1166  BitManipulator::insertBits(stripResetRegisterValue_,
1167  ((uint32_t)channel0) + ((uint32_t)channel1 << 1) +
1168  ((uint32_t)channel2 << 2) + ((uint32_t)channel3 << 3) +
1169  ((uint32_t)channel4 << 4) + ((uint32_t)channel5 << 5),
1170  0,
1171  6);
1172  BitManipulator::insertBits(stripResetRegisterValue_, 1, 30, 1);
1173 }
1174 
1175 //========================================================================================================================
1176 void FSSRFirmwareBase::resetChip(bool channel0,
1177  bool channel1,
1178  bool channel2,
1179  bool channel3,
1180  bool channel4,
1181  bool channel5)
1182 {
1183  stripResetRegisterValue_ = 0;
1184  BitManipulator::insertBits(stripResetRegisterValue_,
1185  ((uint32_t)channel0) + ((uint32_t)channel1 << 1) +
1186  ((uint32_t)channel2 << 2) + ((uint32_t)channel3 << 3) +
1187  ((uint32_t)channel4 << 4) + ((uint32_t)channel5 << 5),
1188  0,
1189  6);
1190  BitManipulator::insertBits(stripResetRegisterValue_, 1, 31, 1);
1191 }
1192 
1193 //========================================================================================================================
1194 void FSSRFirmwareBase::setFrequencyRatio(std::string& buffer,
1195  int numerator,
1196  int denominator)
1197 {
1198  // The device need to load numerator minus one and denominator minus one, with an
1199  // internal address of 0x50 and 052 respectively
1200  communicationFirmwareInstance_->write(
1201  buffer,
1202  STRIP_BCO_DCM,
1203  0x80500000 + (numerator - 1)); // Set BCOCLK numerator // was 0x80500003
1204  communicationFirmwareInstance_->waitClear(
1205  buffer,
1206  STRIP_BCO_DCM,
1207  0xf0000000); // Wait DCM write to finish // was 0x80000000
1208 
1209  communicationFirmwareInstance_->write(
1210  buffer,
1211  STRIP_BCO_DCM,
1212  0x80520000 + (denominator - 1)); // Set BCOCLK denominator // was 0x80520001
1213  communicationFirmwareInstance_->waitClear(
1214  buffer, STRIP_BCO_DCM, 0xf0000000); // Wait DCM write to finish - BCO frequency
1215  // should be 13.513 MHz // was 0x80000000
1216 }
1217 
1218 //========================================================================================================================
1219 void FSSRFirmwareBase::BCOOffset(uint32_t offset)
1220 {
1221  BitManipulator::insertBits(stripTriggerCSRRegisterValue_, offset, 0, 4);
1222 }
1223 
1224 //========================================================================================================================
1225 void FSSRFirmwareBase::selectSpyFIFO(uint32_t input)
1226 {
1227  BitManipulator::insertBits(stripTriggerCSRRegisterValue_, input, 4, 3);
1228 }
1229 
1230 //========================================================================================================================
1231 void FSSRFirmwareBase::halt(bool halt)
1232 {
1233  BitManipulator::insertBits(stripTriggerCSRRegisterValue_, (uint32_t)halt, 7, 1);
1234 }
1235 
1236 //========================================================================================================================
1237 void FSSRFirmwareBase::configureStripTriggerUnbiased(std::string& buffer)
1238 {
1239  communicationFirmwareInstance_->write(
1240  buffer,
1241  STRIP_TRIG_UNBIASED,
1242  0x002805c,
1243  false /*clearBuffer*/); // Configure unbiased trigger
1244 }
1245 
1246 //========================================================================================================================
1247 void FSSRFirmwareBase::configureTriggerInputs(std::string& buffer)
1248 {
1249  // communicationFirmwareInstance_->write(buffer, STRIP_TRIG_INPUT_0, 0x3f440000); //
1250  // FSSR GOTHIT trigger input channel 0,1
1251  // communicationFirmwareInstance_->write(buffer, STRIP_TRIG_INPUT_1, 0x3f440000); //
1252  // FSSR GOTHIT trigger input channel 2,3
1253  communicationFirmwareInstance_->write(
1254  buffer,
1255  STRIP_TRIG_INPUT_0,
1256  0x0,
1257  false /*clearBuffer*/); // FSSR GOTHIT trigger input channel 0,1
1258  communicationFirmwareInstance_->write(
1259  buffer,
1260  STRIP_TRIG_INPUT_1,
1261  0x0,
1262  false /*clearBuffer*/); // FSSR GOTHIT trigger input channel 2,3
1263  communicationFirmwareInstance_->write(
1264  buffer,
1265  STRIP_TRIG_INPUT_2,
1266  0x0,
1267  false /*clearBuffer*/); // FSSR GOTHIT trigger input channel 4,5
1268 }
1269 
1270 //========================================================================================================================
1271 std::string FSSRFirmwareBase::resetSlaveBCO(void)
1272 {
1273  std::string buffer;
1274  /*TODO:make unambiguous by casting to uint32_t*/
1275  communicationFirmwareInstance_->write(
1276  buffer, (uint32_t)0xc5000000, (uint32_t)0x00000008);
1277  return buffer;
1278 }
1279 
1280 /*
1281  //========================================================================================================================
1282  void FSSRFirmwareBase::chipID(uint32_t size)
1283  {
1284  BitManipulator::insertBits(stripSCRegisterValue_, size, 0, 5);
1285  }
1286 
1287  //========================================================================================================================
1288  void FSSRFirmwareBase::addressSlowControls(uint32_t size)
1289  {
1290  BitManipulator::insertBits(stripSCRegisterValue_, size, 5, 5);
1291  }
1292 
1293  //========================================================================================================================
1294  void FSSRFirmwareBase::instructionSlowControls(uint32_t size)
1295  {
1296  BitManipulator::insertBits(stripSCRegisterValue_, size, 10, 3);
1297  }
1298 
1299  //========================================================================================================================
1300  void FSSRFirmwareBase::channelreadSelect(uint32_t size)
1301  {
1302  BitManipulator::insertBits(stripSCRegisterValue_, size, 13, 3);
1303  }
1304 
1305  //========================================================================================================================
1306  void FSSRFirmwareBase::channelMask(uint32_t size)
1307  {
1308  BitManipulator::insertBits(stripSCRegisterValue_, size, 16, 8);
1309  }
1310 
1311  //========================================================================================================================
1312  void FSSRFirmwareBase::bitsLength(uint32_t length)
1313  {
1314  BitManipulator::insertBits(stripSCRegisterValue_, length, 26, 3);
1315  }
1316 
1317 
1318  //========================================================================================================================
1319  void FSSRFirmwareBase::syncFallingBCO(bool sync)
1320  {
1321  BitManipulator::insertBits(stripSCRegisterValue_, (uint32_t)sync, 28, 1);
1322  }
1323 
1324  //========================================================================================================================
1325  void FSSRFirmwareBase::syncRisingBCO(bool sync)
1326  {
1327  BitManipulator::insertBits(stripSCRegisterValue_, (uint32_t)sync, 29, 1);
1328  }
1329 
1330  //========================================================================================================================
1331  void FSSRFirmwareBase::setRaw(bool set)
1332  {
1333  BitManipulator::insertBits(stripSCRegisterValue_, (uint32_t)set, 30, 1);
1334  }
1335 
1336  //========================================================================================================================
1337  void FSSRFirmwareBase::initSlowControls(bool init)
1338  {
1339  BitManipulator::insertBits(stripSCRegisterValue_, (uint32_t)init, 31, 1);
1340  }
1341 
1342  //========================================================================================================================
1343  void FSSRFirmwareBase::resetCount(bool reset)
1344  {
1345  BitManipulator::insertBits(stripAnalysisCSRRegisterValue_, (uint32_t)reset, 30, 1);
1346  }
1347 
1348  //========================================================================================================================
1349  void FSSRFirmwareBase::setBCO_0(uint32_t void FSSRFirmwareBase::BCOOffset(uint32_t
1350  offset)
1351  {
1352  BitManipulator::insertBits(stripTrigCSRRegisterValue_, offset, 0, 4);
1353  }input)
1354  {
1355  BitManipulator::insertBits(trigInputRegisterValue_, input, 0, 8);
1356  }
1357 
1358  //========================================================================================================================
1359  void FSSRFirmwareBase::setBCO_1(uint32_t input)
1360  {
1361  BitManipulator::insertBits(trigInputRegisterValue_, input, 8, 8);
1362  }
1363 
1364  //========================================================================================================================
1365  void FSSRFirmwareBase::trimFracBCO_0(uint32_t input)
1366  {
1367  BitManipulator::insertBits(trigInputRegisterValue_, input, 16, 4);
1368  }
1369 
1370  //========================================================================================================================
1371  void FSSRFirmwareBase::trimFracBCO_1(uint32_t input)
1372  {
1373  BitManipulator::insertBits(trigInputRegisterValue_, input, 20, 4);
1374  }
1375 
1376  //========================================================================================================================
1377  void FSSRFirmwareBase::enable_0(bool enable)
1378  {
1379  BitManipulator::insertBits(trigInputRegisterValue_, (uint32_t)enable, 28, 1);
1380  }
1381 
1382  //========================================================================================================================
1383  void FSSRFirmwareBase::enable_1(bool enable)
1384  {
1385  BitManipulator::insertBits(trigInputRegisterValue_, (uint32_t)enable, 29, 1);
1386  }
1387 
1388  */
void makeDACBuffer(std::string &buffer, unsigned int channel, const ROCStream &rocStream)