otsdaq_components  v2_02_00
FSSROtsFirmware.cc
1 #include "otsdaq-components/DAQHardware/FSSROtsFirmware.h"
2 
3 //#include "otsdaq-components/DAQHardware/FSSRFirmwareDefinitions.h"
4 //#include "otsdaq-core/BitManipulator/BitManipulator.h"
5 //#include "otsdaq-components/DetectorHardware/FSSRROCDefinitions.h"
6 
7 #include "otsdaq-components/DAQHardware/FrontEndFirmwareBase.h"
8 #include "otsdaq-components/DAQHardware/PurdueFirmwareCore.h"
9 #include "otsdaq-components/DAQHardware/OtsUDPFirmwareCore.h"
10 
11 
12 #include "otsdaq-core/MessageFacility/MessageFacility.h"
13 #include "otsdaq-core/Macros/CoutMacros.h"
14 #include <sys/socket.h>
15 #include <netinet/in.h>
16 #include <arpa/inet.h>
17 
18 #include <iostream>
19 #include <cstdlib>
20 
21 using namespace ots;
22 
23 
24 //========================================================================================================================
25 FSSROtsFirmware::FSSROtsFirmware(std::string communicationFirmwareType,
26  unsigned int communicationFirmwareVersion,
27  unsigned int applicationFirmwareVersion)
28 : FSSRFirmwareBase (communicationFirmwareType,communicationFirmwareVersion,applicationFirmwareVersion)
29 {}
30 // //choose: OtsUDPFirmwareCore or PurdueFirmwareCore
31 // if(communicationFirmwareType == FrontEndFirmwareBase::PURDUE_CORE_FIRMWARE_NAME)
32 // communicationFirmwareInstance_ = new PurdueFirmwareCore(communicationFirmwareVersion);
33 // if(communicationFirmwareType == FrontEndFirmwareBase::OTS_CORE_FIRMWARE_NAME)
34 // communicationFirmwareInstance_ = new OtsUDPFirmwareCore(communicationFirmwareVersion);
35 // else
36 // {
37 // __SS__ << "Unknown firmware type choice: " << choice << std::endl;
38 // __COUT_ERR__ << ss.str();
39 // __SS_THROW__;
40 // }
41 //
42 //
43 // //make protocol a class member
44 // //protocolInstance_ = new OtsFirmwareCore(version);//AUG-17-2017 RAR dissociated because function calls are entirely independent from PURDUE firmware calls // //FrontEndFirmwareBase::getInstance(type,version);
45 // //assert(protocolInstance_ != NULL);
46 // //returns either new OtsUDPFirmware or new PurdueFirmwareCore,
47 // //now we can call write/read etc with protocol->write, protocol->read, etc
48 //}
49 
50 //========================================================================================================================
51 FSSROtsFirmware::~FSSROtsFirmware(void)
52 {
53  //delete protocolInstance_;
54  //protocolInstance_ = NULL;
55 }
56 
57 //========================================================================================================================
58 void FSSROtsFirmware::init(void)
59 { }
60 
61 /*
62 //========================================================================================================================
63 std::string FSSROtsFirmware::configureClocks(std::string source, double frequency)
64 {
65  std::cout << __COUT_HDR_FL__ << "Writing Clock configuration!" << std::endl;
66 
67  std::string buffer;
68  //NoNeedNowwrite(buffer, ETHIO_DESTINATION_PORT, 0x0000b798); // Listen port for ethio stuff
69 
70  setPacketSizeStripCSR(6);
71  setExternalBCOClockSourceStripCSR(source); //(source)
72  OtsUDPFirmwareCore::write(buffer, STRIP_CSR, stripCSRRegisterValue_); // Reset CSR - reset trigger counter, external 27 MHz clock
73 
74  resetDCMStripCSR(true);
75  OtsUDPFirmwareCore::write(buffer, STRIP_CSR, stripCSRRegisterValue_); // Set reset to DCM
76 
77  resetDCMStripCSR(false);
78  OtsUDPFirmwareCore::write(buffer, STRIP_CSR, stripCSRRegisterValue_); // Clear reset to DCM
79 
80  ;
81  //FIXME? Does Nothing RAR Aug 2017// OtsUDPFirmwareCore::waitClear(buffer, STRIP_CSR, waitDCMResetStripCSR()); // Wait for DCM to lock
82 
83  OtsUDPFirmwareCore::write(buffer, STRIP_TRIM_CSR, 0x00002000); // MCLKB edge for channel 5 // was 0x00002000
84 
85  setFrequencyFromClockState(buffer, frequency);
86  OtsUDPFirmwareCore::write(buffer, STRIP_CSR, stripCSRRegisterValue_);
87 
88  resetDCMStripCSR(true);
89  OtsUDPFirmwareCore::write(buffer, STRIP_CSR, stripCSRRegisterValue_);
90 
91  resetDCMStripCSR(false);
92  OtsUDPFirmwareCore::write(buffer, STRIP_CSR, stripCSRRegisterValue_);
93 
94  //FIXME? Does Nothing RAR Aug 2017//OtsUDPFirmwareCore::waitClear(buffer, STRIP_CSR, waitDCMResetStripCSR()); // Wait for DCM to lock
95  std::cout << __COUT_HDR_FL__ << "stripCSRRegisterValue :" << std::hex << stripCSRRegisterValue_ << std::dec << std::endl;
96 
97  return buffer;
98 }
99 
100 //========================================================================================================================
101 std::string FSSROtsFirmware::resetDetector(int channel)
102 {
103  std::cout << __COUT_HDR_FL__ << "Resetting detector!" << std::endl;
104  std::string buffer;
105  if (channel == -1)//reset all channels
106  {
107  //write(buffer,STRIP_RESET,0xd000003f); // Issue reset
108  OtsUDPFirmwareCore::write(buffer, STRIP_RESET, 0xf000003f); // Issue reset // was 0xf000003f
109  //FIXME? Does Nothing RAR Aug 2017//OtsUDPFirmwareCore::waitClear(buffer, STRIP_RESET, 0xf0000000); // Wait for reset to complete // was 0xf0000000
110  } else
111  {
112  OtsUDPFirmwareCore::write(buffer, STRIP_RESET, 0xf000003f); // Issue reset
113  //FIXME? Does Nothing RAR Aug 2017//OtsUDPFirmwareCore::waitClear(buffer, STRIP_RESET, 0xf0000000); // Wait for reset to complete
114  }
115 
116  return buffer;
117 }
118 
119 //========================================================================================================================
120 std::string FSSROtsFirmware::enableTrigger(void)
121 {
122  std::string buffer;
123  std::cout << __COUT_HDR_FL__ << "Enabling Trigger!!!" << std::endl;
124  std::cout << __COUT_HDR_FL__ << "stripCSRRegisterValue in :" << std::hex << stripCSRRegisterValue_ << std::dec << std::endl;
125 
126  setHaltStripCSR(1);//WARNING THIS IS CLEARED BY THE MASTER BUT IF THERE IS NO MASTER NOTHING WORKS UNLESS THE BIT IS UNSET
127  //setHaltStripCSR(0);//WARNING THIS IS CLEARED BY THE MASTER BUT IF THERE IS NO MASTER NOTHING WORKS UNLESS THE BIT IS UNSET
128  sendTriggerDataStripCSR(true);
129  sendTriggerNumberStripCSR(true);
130  sendBCOStripCSR(true);
131  OtsUDPFirmwareCore::write(buffer, STRIP_CSR, stripCSRRegisterValue_);
132 
133  stripTriggerCSRRegisterValue_ = 0;
134  BCOOffset(4);
135  OtsUDPFirmwareCore::write(buffer, STRIP_TRIG_CSR, stripTriggerCSRRegisterValue_); // BCO offset // was 0x00000004
136 
137  // write(buffer,STRIP_TRIG_INPUT_0,0x1f060040); // FSSR GOTHIT trigger input - timed in for the 27 MHz external clock
138  // write(buffer,STRIP_TRIG_INPUT_3,0x3f874040); // Unbiased trigger input + external trigger
139 
140  configureStripTriggerUnbiased(buffer);
141 
142  configureTriggerInputs(buffer);
143 
144  //FIXME for IP .36 the number to set is 0x20401000
145 
146  if (OtsUDPFirmwareCore::version_ == 1)
147  OtsUDPFirmwareCore::write(buffer, STRIP_TRIG_INPUT_3, 0x20401000); // Turn on streaming hits along with BCO data
148  else if (OtsUDPFirmwareCore::version_ == 2)
149  OtsUDPFirmwareCore::write(buffer, STRIP_TRIG_INPUT_3, 0x20301000); // Turn on streaming hits along with BCO data
150  else
151  {
152  __SS__ << "what version is this?" <<
153  OtsUDPFirmwareCore::version_ << std::endl;
154  __COUT_ERR__ << "\n" << ss.str();
155  __SS_THROW__;
156  }
157  std::cout << __COUT_HDR_FL__ << "stripCSRRegisterValue out:" << std::hex << stripCSRRegisterValue_ << std::dec << std::endl;
158  std::cout << __COUT_HDR_FL__ << "Done enabling Trigger!!!" << std::endl;
159 
160  return buffer;
161 }
162 
163 //========================================================================================================================
164 void FSSROtsFirmware::readBurstDestinationIP(std::string& buffer)
165 {
166  OtsUDPFirmwareCore::read(buffer, (uint64_t)0x0000000100000006);
167 }
168 
169 //========================================================================================================================
170 void FSSROtsFirmware::readBurstDestinationMAC(std::string& buffer)
171 {
172  OtsUDPFirmwareCore::read(buffer, (uint64_t)0x0000000100000007);
173 }
174 
175 //========================================================================================================================
176 void FSSROtsFirmware::readBurstDestinationPort(std::string& buffer)
177 {
178  OtsUDPFirmwareCore::read(buffer, (uint64_t)0x0000000100000008);
179 }
180 
181 //========================================================================================================================
182 void FSSROtsFirmware::writeBurstDestinationIP(std::string& buffer, const uint64_t value)
183 {
184  OtsUDPFirmwareCore::write(buffer, (uint64_t)0x0000000100000006, value);
185 }
186 
187 //========================================================================================================================
188 void FSSROtsFirmware::writeBurstDestinationMAC(std::string& buffer, const uint64_t value)
189 {
190  OtsUDPFirmwareCore::write(buffer, (uint64_t)0x0000000100000007, value);
191 }
192 
193 //========================================================================================================================
194 void FSSROtsFirmware::writeBurstDestinationPort(std::string& buffer, const uint64_t value)
195 {
196  OtsUDPFirmwareCore::write(buffer, 0x0000000100000008, value);
197 }
198 
199 //========================================================================================================================
200 std::string FSSROtsFirmware::resetBCO(void)
201 {
202  std::cout << __COUT_HDR_FL__ << "Reset BCO!!!" << std::endl;
203  std::cout << __COUT_HDR_FL__ << "stripCSRRegisterValue in :" << std::hex << stripCSRRegisterValue_ << std::dec << std::endl;
204  std::string buffer;
205 
206  resetTriggerCounterStripCSR(buffer);
207  //write(buffer, STRIP_CSR, stripCSRRegisterValue_);//the write is done in the reset
208  std::cout << __COUT_HDR_FL__ << "stripCSRRegisterValue :" << std::hex << stripCSRRegisterValue_ << std::dec << std::endl;
209 
210  //msg->Write(STRIP_SC_CSR,0x90000b95|(chmask<<16));
211  //write(buffer,STRIP_SC_CSR,0x900f0b95);// This is the <SCR,set> command with the bit set to sync SHIFT with BCO=0.
212 
213 
214  enableBCOStripCSR(true);
215  OtsUDPFirmwareCore::write(buffer, STRIP_CSR, stripCSRRegisterValue_);
216  std::cout << __COUT_HDR_FL__ << "stripCSRRegisterValue out:" << std::hex << stripCSRRegisterValue_ << std::dec << std::endl;
217  std::cout << __COUT_HDR_FL__ << "Done reset BCO!!!" << std::endl;
218 
219  return buffer;
220 }
221 
222 //========================================================================================================================
223 std::string FSSROtsFirmware::startStream(bool channel0, bool channel1, bool channel2, bool channel3, bool channel4, bool channel5)
224 {
225  std::cout << __COUT_HDR_FL__ << "Start Stream!" << std::endl;
226  std::cout << __COUT_HDR_FL__ << "stripCSRRegisterValue in:" << std::hex << stripCSRRegisterValue_ << std::dec << std::endl;
227  std::string buffer;
228 
229  std::cout << __COUT_HDR_FL__ << " channel0 " << channel0 << " channel1 " << channel1 << " channel2 " << channel2 << " channel3 " << channel3 << " channel4 " << channel4 << " channel5 " << channel5 << std::endl;
230 
231  enableChannelsStripCSR(channel0, channel1, channel2, channel3, channel4, channel5);
232  // if (version_ == 1)
233  // enableChannelsStripCSR(true, true, true, true, false, false);
234  // else if (version_ == 2)
235  // enableChannelsStripCSR(true, true, true, true, true, true);
236 
237  enableStreamStripCSR(true); // Turn on streaming hits along with BCO data // was 0x0f000f30
238  OtsUDPFirmwareCore::write(buffer, STRIP_CSR, stripCSRRegisterValue_);
239 
240  std::cout << __COUT_HDR_FL__ << "stripCSRRegisterValue out:" << std::hex << stripCSRRegisterValue_ << std::dec << std::endl;
241  std::cout << __COUT_HDR_FL__ << "Done start Stream!" << std::endl;
242 
243  return buffer;
244 }
245 
246 //========================================================================================================================
247 std::string FSSROtsFirmware::stopStream(void)
248 {
249  std::string buffer;
250  enableChannelsStripCSR(false, false, false, false, false, false);
251  enableStreamStripCSR(false);
252  OtsUDPFirmwareCore::write(buffer, STRIP_CSR, stripCSRRegisterValue_);
253  return buffer;
254 }
255 
256 //========================================================================================================================
257 void FSSROtsFirmware::makeDACSequence(FirmwareSequence<uint64_t>& sequence,
258  unsigned int channel, const ROCStream& rocStream)
259 {
260  const ROCDACs& rocDACs = rocStream.getROCDACs();
261  for (DACList::const_iterator it = rocDACs.getDACList().begin(); it
262  != rocDACs.getDACList().end(); it++)
263  {
264  //if(it->first != "SendData" && it->first != "RejectHits") continue;
265  uint64_t data = FSSRROCDefinitions::makeDACWriteCommand(
266  rocStream.getFEWROCAddress(), it->first, it->second.second);
267  sequence.pushBack(ChannelFIFOAddress[channel], data);
268  sequence.pushBack(ChannelFIFOAddress[channel],
269  BitManipulator::insertBits(data, (uint64_t) 0x48, 56, 8));
270  //set WRITE
271  sequence.pushBack(ChannelFIFOAddress[channel],
272  BitManipulator::insertBits(data, (uint64_t) 1, 60, 1));
273  //clr WRITE
274  sequence.pushBack(ChannelFIFOAddress[channel],
275  BitManipulator::insertBits(data, (uint64_t) 0, 60, 1));
276  //clr TALK
277  sequence.pushBack(ChannelFIFOAddress[channel],
278  BitManipulator::insertBits(data, (uint64_t) 0, 62, 1));
279  sequence.pushBack(ChannelFIFOAddress[channel],
280  BitManipulator::insertBits(data, (uint64_t) 0x40, 56, 8));
281  //break;
282  }
283 }
284 
285 //========================================================================================================================
286 void FSSROtsFirmware::makeDACSequence(FirmwareSequence<uint32_t>& sequence,
287  unsigned int channel, const ROCStream& rocStream)
288 {
289  const ROCDACs& rocDACs = rocStream.getROCDACs();
290  for (DACList::const_iterator it = rocDACs.getDACList().begin(); it
291  != rocDACs.getDACList().end(); it++)
292  {
293  //RYAN
294  //if(it->first != "SendData" && it->first != "RejectHits") continue;
295  uint64_t data = FSSRROCDefinitions::makeDACWriteCommand(rocStream.getFEWROCAddress(), it->first, it->second.second);
296  //sequence.pushBack(ChannelFIFOAddress[channel], data);
297  //sequence.pushBack(ChannelFIFOAddress[channel], BitManipulator::insertBits(data,(uint32_t)0x48,56,8));
298  //set WRITE
299  //sequence.pushBack(ChannelFIFOAddress[channel], BitManipulator::insertBits(data,(uint32_t)1,60,1));
300  //clr WRITE
301  //sequence.pushBack(ChannelFIFOAddress[channel], BitManipulator::insertBits(data,(uint32_t)0,60,1));
302  //clr TALK
303  //sequence.pushBack(ChannelFIFOAddress[channel], BitManipulator::insertBits(data,(uint32_t)0,62,1));
304  //sequence.pushBack(ChannelFIFOAddress[channel], BitManipulator::insertBits(data,(uint32_t)0x40,56,8));
305 
306 
307  //if(it->first != "SendData" && it->first != "RejectHits") continue;
308  uint32_t data = FSSRROCDefinitions::makeDACWriteHeader(
309  rocStream.getFEWROCAddress(), it->first);
310  //Insert channel
311  BitManipulator::insertBits(data, 1, 16 + channel, 1);
312  sequence.pushBack(ChannelFIFOAddress[channel], it->second.second);
313  std::cout << __COUT_HDR_FL__ << __PRETTY_FUNCTION__ << "Register: " << it->first << " value: "
314  << it->second.second << std::hex << " -> Data: " << data << std::dec
315  << std::endl;
316  sequence.pushBack(STRIP_SC_CSR, data);
317  }
318 }
319 
320 //========================================================================================================================
321 void FSSROtsFirmware::makeDACBuffer(std::string& buffer,
322  unsigned int channel, const ROCStream& rocStream)
323 {
324  std::cout << __COUT_HDR_FL__ << __PRETTY_FUNCTION__ << "Channel: " << channel << std::endl;
325  const ROCDACs& rocDACs = rocStream.getROCDACs();
326  for (DACList::const_iterator it = rocDACs.getDACList().begin(); it != rocDACs.getDACList().end(); it++)
327  {
328  std::string bufferElement;
329  //FIXME? Does Nothing RAR Aug 2017//OtsUDPFirmwareCore::waitClear(bufferElement, STRIP_SC_CSR, 0x80000000);
330  uint32_t registerHeader = 0;
331  //FIXME This must go in the FSSRROCDefinitions stuff
332  if (it->first != "RejectHits" && it->first != "SendData")
333  {
334  OtsUDPFirmwareCore::write(bufferElement, ChannelFIFOAddress[channel], it->second.second);
335  registerHeader = FSSRROCDefinitions::makeDACWriteHeader(
336  rocStream.getFEWROCAddress(), it->first);
337  //std::cout << __COUT_HDR_FL__ << __PRETTY_FUNCTION__ << "Register: " << it->first << " value: " << it->second.second << std::hex << " -> Data: " << registerHeader << std::dec << std::endl;
338  //Insert channel
339  BitManipulator::insertBits(registerHeader, 1, 16 + channel, 1);
340  }
341  else
342  {
343  if (it->second.second == 1 || it->second.second == 2)
344  {
345  registerHeader = FSSRROCDefinitions::makeDACSetHeader(
346  rocStream.getFEWROCAddress(), it->first);
347  //Insert channel
348  BitManipulator::insertBits(registerHeader, 1, 16 + channel, 1);
349  }
350  else if (it->second.second == 0 || it->second.second == 5)
351  {
352  registerHeader = FSSRROCDefinitions::makeDACResetHeader(
353  rocStream.getFEWROCAddress(), it->first);
354  //Insert channel
355  BitManipulator::insertBits(registerHeader, 1, 16 + channel, 1);
356  }
357  else
358  std::cout << __COUT_HDR_FL__ << "Register value for : " << it->first
359  << " doesn't have a value I expect -> value = "
360  << it->second.second << std::endl;
361 
362  }
363  //std::cout << __COUT_HDR_FL__ << __PRETTY_FUNCTION__ << "Register: " << it->first << " value: " << it->second.second << std::hex << " -> Data: " << registerHeader << std::dec << std::endl;
364  OtsUDPFirmwareCore::write(bufferElement, STRIP_SC_CSR, registerHeader);
365  //FIXME? Does Nothing RAR Aug 2017//OtsUDPFirmwareCore::waitClear(bufferElement, STRIP_SC_CSR, 0x80000000);
366 
367  //buffer.push_back(bufferElement);
368  buffer += bufferElement;
369  //break;
370  }
371 }
372 
373 //========================================================================================================================
374 void FSSROtsFirmware:: makeDACBuffer(std::vector<std::string>& buffer, unsigned int channel, const ROCStream& rocStream)
375 {
376 
377  std::cout << __COUT_HDR_FL__ << "\tMaking DAC Buffer" << std::endl;
378 
379  int limitCount = 0;
380  unsigned int singleVectorCount = 0;
381 
382  std::string alternateBuffer;
383 
384  std::cout << __COUT_HDR_FL__ << __PRETTY_FUNCTION__ << "Channel: " << channel << std::endl;
385  const ROCDACs& rocDACs = rocStream.getROCDACs();
386  //std::cout << __COUT_HDR_FL__ << __PRETTY_FUNCTION__ << "Number of DACs: " << rocDACs.getDACList().size() << std::endl;
387  std::string bufferElement;
388  for (DACList::const_iterator it = rocDACs.getDACList().begin(); it != rocDACs.getDACList().end(); it++)
389  {
390  //FIXME? Does Nothing RAR Aug 2017//OtsUDPFirmwareCore::waitClear(bufferElement, STRIP_SC_CSR, 0x80000000);
391  uint32_t registerHeader = 0;
392  //FIXME This must go in the FSSRROCDefinitions stuff
393  if (it->first != "RejectHits" && it->first != "SendData")
394  {
395  OtsUDPFirmwareCore::write(bufferElement, ChannelFIFOAddress[channel], it->second.second);
396  registerHeader = FSSRROCDefinitions::makeDACWriteHeader(
397  rocStream.getFEWROCAddress(), it->first);
398  std::cout << __COUT_HDR_FL__ << __PRETTY_FUNCTION__ << "Register: " << it->first << " value: " << it->second.second << std::hex << " -> Data: " << registerHeader << std::dec << std::endl;
399  //Insert channel
400  BitManipulator::insertBits(registerHeader, 1, 16 + channel, 1);
401  }
402  else
403  {
404  if (it->second.second == 1 || it->second.second == 2)
405  {
406  registerHeader = FSSRROCDefinitions::makeDACSetHeader(
407  rocStream.getFEWROCAddress(), it->first);
408  //Insert channel
409  BitManipulator::insertBits(registerHeader, 1, 16 + channel, 1);
410  }
411  else if (it->second.second == 0 || it->second.second == 5)
412  {
413  registerHeader = FSSRROCDefinitions::makeDACResetHeader(
414  rocStream.getFEWROCAddress(), it->first);
415  //Insert channel
416  BitManipulator::insertBits(registerHeader, 1, 16 + channel, 1);
417  }
418  else
419  std::cout << __COUT_HDR_FL__ << "Register value for : " << it->first
420  << " doesn't have a value I expect -> value = "
421  << it->second.second << std::endl;
422 
423  }
424  //std::cout << __COUT_HDR_FL__ << __PRETTY_FUNCTION__ << "Register: " << it->first << " value: " << it->second.second << std::hex << " -> Data: " << registerHeader << std::dec << std::endl;
425  OtsUDPFirmwareCore::write(bufferElement, STRIP_SC_CSR, registerHeader);
426  //FIXME? Does Nothing RAR Aug 2017//OtsUDPFirmwareCore::waitClear(bufferElement, STRIP_SC_CSR, 0x80000000);
427 
428  //alternateBuffer += bufferElement;
429  limitCount++;
430  singleVectorCount++;
431 
432  if (limitCount == STIB_DAC_WRITE_MAX)
433  {
434  std::cout << __COUT_HDR_FL__ << "\tBuffer lenght:" << bufferElement.size() << std::endl;
435  buffer.push_back(bufferElement);
436  limitCount = 0;
437  bufferElement.clear();
438  }
439  else if (singleVectorCount == rocDACs.getDACList().size()) //case for imcomplete packet
440  {
441  buffer.push_back(bufferElement);
442  }
443 
444  //buffer.push_back(bufferElement);
445  //break;
446  }
447  std::cout << __COUT_HDR_FL__ << "\tDone making DAC Buffer" << std::endl;
448 
449 }
450 
451 //========================================================================================================================
452 void FSSROtsFirmware::makeMaskBuffer(std::string& buffer, unsigned int channel,
453  const ROCStream& rocStream)
454 {
455  std::cout << __COUT_HDR_FL__ << "Making mask! " << std::endl;
456  makeMaskBuffer(buffer, channel, rocStream, "Kill");
457  // makeMaskSequence(buffer, channel, rocStream, "Inject");
458 }
459 
460 //========================================================================================================================
461 void FSSROtsFirmware::makeMaskBuffer(std::string& buffer, unsigned int channel, const ROCStream& rocStream, const std::string& registerName)
462 {
463  std::cout << __COUT_HDR_FL__ << "\tMaking mask! " << std::endl;
464  int chipId = rocStream.getFEWROCAddress();
465  std::string mask = rocStream.getROCMask();
466  std::cout << __COUT_HDR_FL__ << "\tMask length: " << mask.length() << std::endl;
467 
468  unsigned int data[4] = { 0, 0, 0, 0 };
469 
470  char val;
471  //int j = 0;
472  for (unsigned int d = 0; d < 4; d++)
473  { //d goes from 0 to 4. 4 bytes
474  //std::cout << __COUT_HDR_FL__ << "---------------------" << d << "-------------------" << std::endl;
475  for (unsigned int m = 0; m < 8 * 4; m++)
476  { //m goes from 0 to 31, since each byte has 8 bits, there are 32 bits
477  val = mask[(8 * 4 * d) + m]; //assigns to val the value of the corresponding bit. 0-31, 32-63, 64-95, 96-127. it goes through each of the 128 bits
478  //std::cout << __COUT_HDR_FL__ << "---------------------" << j++ << std::endl;
479  //std::cout << __COUT_HDR_FL__ << "data[" << d << "] before: " << std::hex << data[d] << std::dec << std::endl;
480  data[d] |= (unsigned int) atoi(&val) << (8 * 4 - 1 - m);
481  //std::cout << __COUT_HDR_FL__ << "(unsigned int) atoi(&val): " << (unsigned int) atoi(&val) << std::endl;
482  //std::cout << __COUT_HDR_FL__ << "data[" << d << "] after: " << std::hex << data[d] << std::dec << std::endl;
483  //std::cout << __COUT_HDR_FL__ << std::hex << "D: " << data[d] << " Val: " << (unsigned int)atoi(&val) << " index: " << std::dec << (8*4-1-m) << " bit: " << mask[(8*4*d)+m] << std::dec << std::endl;
484  }
485  //
486  }
487 
488  int i, ierr;
489  unsigned int w;
490  unsigned char len = 4;
491  unsigned char addr = 17;//Kill
492  unsigned char bitMask = 1 << channel;
493  unsigned char inst = WRITE;
494 
495  //FIXME? Does Nothing RAR Aug 2017//OtsUDPFirmwareCore::waitClear(buffer, STRIP_SC_CSR, 0x80000000);
496 
497  for (i = 0; i < 4; i++)
498  //write(buffer, STRIP_SCI + 4 * i, data[i]);
499  OtsUDPFirmwareCore::write(buffer, STRIP_SCI + 4 * (4 - i - 1), data[i]);
500 
501  w = 0x80000000 | (len << 24) | (bitMask << 16) | (inst << 10) | (addr << 5) | chipId;
502 
503  //ierr = OtsUDPFirmwareCore::write(buffer, STRIP_SC_CSR, w);
504  OtsUDPFirmwareCore::write(buffer, STRIP_SC_CSR, w);
505 
506  //FIXME? Does Nothing RAR Aug 2017//OtsUDPFirmwareCore::waitClear(buffer, STRIP_SC_CSR, 0x80000000);
507 }
508 
509 //========================================================================================================================
510 void FSSROtsFirmware::makeMaskSequence(FirmwareSequence<uint64_t>& sequence,
511  unsigned int channel, const ROCStream& rocStream)
512 {
513  std::cout << __COUT_HDR_FL__ << "Making mask! " << std::endl;
514  makeMaskSequence(sequence, channel, rocStream, "Kill");
515  // makeMaskSequence(sequence, channel, rocStream, "Inject");
516 }
517 
518 //========================================================================================================================
519 void FSSROtsFirmware::makeMaskSequence(FirmwareSequence<uint32_t>& sequence,
520  unsigned int channel, const ROCStream& rocStream)
521 {
522  std::cout << __COUT_HDR_FL__ << "Making mask! " << std::endl;
523  makeMaskSequence(sequence, channel, rocStream, "Kill");
524  // makeMaskSequence(channel,rocStream,sequence,"Inject");
525 }
526 
527 //========================================================================================================================
528 void FSSROtsFirmware::makeMaskSequence(FirmwareSequence<uint64_t>& sequence,
529  unsigned int channel, const ROCStream& rocStream,
530  const std::string& registerName)
531 {
532  int chipId = rocStream.getFEWROCAddress();//9, 14 or 21 bcast
533  std::string mask = rocStream.getROCMask();
534  std::cout << __COUT_HDR_FL__ << "Mask length: " << mask.length() << std::endl;
535 
536  uint64_t uInt64Data = 0;
537  std::string stringData = "";
538 
539  //have to manually set every bit for mask writes.
540  //reset fifo
541  //download every bit (shift_in and shift_ctrl) to fifo (setup muxes and control lines)
542  //configure muxes for readout
543  //commence readout
544 
545  //FIFO Controls - byte 5 (7:0)
546  //7 - FIFO Clock
547  //6 - Shift Ctrl bit
548  //MASK_CELL_H - Shift In bit
549  //MUX Controls - byte 0 (7:0)
550  //7 - Read En/Output MUX sel (1 for masks)
551  //1 - Write En for mux
552  //0 - Reset Fifo
553 
554  //reset fifo
555  BitManipulator::insertBits(uInt64Data, 0x1, 56, 8);
556  sequence.pushBack(ChannelFIFOAddress[channel], uInt64Data);
557 
558  //configure fifo for write
559  BitManipulator::insertBits(uInt64Data, 0x2, 56, 8);
560  sequence.pushBack(ChannelFIFOAddress[channel], uInt64Data);
561 
562  //Download every bit (shift_in and shift_control) to fifo (setup muxes and control lines)
563  //Bit 7 of data is FIFO clock, bit 6 is shift_control, bit 5 is shift_in
564  //start bits (ctrl 0, data 0 => ctrl 1, data 0)
565 
566  BitManipulator::insertBits(uInt64Data, 0x40, 16, 8);//(0<<7) | (1<<6) | (0<<5)
567  sequence.pushBack(ChannelFIFOAddress[channel], uInt64Data);
568  BitManipulator::insertBits(uInt64Data, 0xc0, 16, 8);//(1<<7) | (1<<6) | (0<<5) -> clock the data in the fifo
569  sequence.pushBack(ChannelFIFOAddress[channel], uInt64Data);
570 
571  stringData = FSSRROCDefinitions::makeMaskWriteCommand(chipId,
572  registerName, mask);
573 
574  uint8_t data;
575  for (unsigned int s = 0; s < stringData.length(); s++)
576  for (int b = 8 - 1; b >= 0 && (s * 8 + 8 - b < 13 + 128); b--)
577  {
578  //std::cout << __COUT_HDR_FL__ << "S: " << s << " val: " << stringData.data()[s] << " b: " << b << " bit: " << ((stringData.data()[s]>>b)&1) << std::endl;
579  data = 0x40 | (((stringData.data()[s] >> b) & 1) << 5);
580  BitManipulator::insertBits(uInt64Data, (uint64_t) data, 16, 8);
581  sequence.pushBack(ChannelFIFOAddress[channel], uInt64Data);
582  data |= 0x80;
583  BitManipulator::insertBits(uInt64Data, (uint64_t) data, 16, 8);
584  sequence.pushBack(ChannelFIFOAddress[channel], uInt64Data);
585  }
586 
587  //reset Shift Control
588  BitManipulator::insertBits(uInt64Data, 0x0, 16, 8);
589  sequence.pushBack(ChannelFIFOAddress[channel], uInt64Data);
590  BitManipulator::insertBits(uInt64Data, 0x80, 16, 8);
591  sequence.pushBack(ChannelFIFOAddress[channel], uInt64Data);
592 
593  //configure muxes for readout
594  BitManipulator::insertBits(uInt64Data, 0x0, 56, 8);
595  sequence.pushBack(ChannelFIFOAddress[channel], uInt64Data);
596 
597  //commence readout
598  BitManipulator::insertBits(uInt64Data, 0x80, 56, 8);
599  sequence.pushBack(ChannelFIFOAddress[channel], uInt64Data);
600 
601 }
602 
603 //========================================================================================================================
604 void FSSROtsFirmware::makeMaskSequence(FirmwareSequence<uint32_t>& sequence,
605  unsigned int channel, const ROCStream& rocStream,
606  const std::string& registerName)
607 {}
608 
609 //========================================================================================================================
610 std::string FSSROtsFirmware::readCSRRegister()
611 {
612  std::string buffer;
613  OtsUDPFirmwareCore::read(buffer,STRIP_CSR);
614  return buffer;
615 }
616 
617 //========================================================================================================================
618 void FSSROtsFirmware::setFrequencyFromClockState(std::string& buffer, double frequency)
619 {
620  std::cout << __COUT_HDR_FL__ << "Setting up clock frequency!!!" << std::endl;
621 
622  int quotient;
623  int numerator;
624  int denominator;
625  double realClockFrequency;
626 
627  if (BitManipulator::readBits(stripCSRRegisterValue_, 17, 1) == 1) //if fastBCO is enabled
628  quotient = 4;
629  else //normal cases
630  quotient = 8;
631 
632  if (isClockStateExternal()) //base freq: 54MHz
633  {
634  realClockFrequency = EXTERNAL_CLOCK_FREQUENCY / quotient; //this is the REAL frequency being used
635  }
636  else //base freq: 66.667MHz
637  {
638  realClockFrequency = INTERNAL_CLOCK_FREQUENCY / quotient; //this is the REAL frequency being used
639  }
640 
641  double factor = frequency / realClockFrequency;
642 
643  //The device needs the denominator and the denominator to be load into a 5 bit register
644  //It will take two initial numerator and denominator bigger than necessary (to do not loose precision)
645  //and divide them for their gcd. If they still do not fit in 5 bit, they are trunked (divided by 2)
646  //untill they are less than 32
647  numerator = factor * 100; //we will work with 2 digits precision after the decimal point
648  denominator = 100;
649 
650  do
651  {
652  //We will need the GCD at some point in order to simplify fractions //taken from other sources
653  int gcd = numerator;
654  int rest = denominator;
655  int tmp;
656 
657  while (rest != 0)
658  {
659  tmp = rest;
660  rest = gcd % tmp;
661  gcd = tmp;
662  }
663  //Done finding the GCD
664 
665  if (gcd == 1) //if there's no GCD, just divide by 2 to find the nearest approssimation with less bits
666  {
667  numerator /= 2;
668  denominator /= 2;
669  }
670  else
671  {
672  numerator /= gcd;
673  denominator /= gcd;
674  }
675 
676  }
677  while (denominator >= 32 || numerator >= 32);
678  std::cout << __COUT_HDR_FL__ << "Numerator: " << numerator << std::endl;
679  std::cout << __COUT_HDR_FL__ << "Denominator: " << denominator << std::endl;
680  setFrequencyRatio(buffer, numerator, denominator);
681  std::cout << __COUT_HDR_FL__ << "Done with clock frequency setup!!!" << std::endl;
682 }
683 //========================================================================================================================
684 bool FSSROtsFirmware::isClockStateExternal() //returns true if the clock state is External
685 {
686  if (BitManipulator::readBits(stripCSRRegisterValue_, 16, 1) == 1)
687  return true;
688  else
689  return false;
690 }
691 
692 //========================================================================================================================
693 void FSSROtsFirmware::setCSRRegister(uint32_t total)
694 {
695  stripCSRRegisterValue_ = total;
696 }
697 
698 //========================================================================================================================
699 void FSSROtsFirmware::writeCSRRegister(std::string& buffer)
700 {
701  OtsUDPFirmwareCore::write(buffer, STRIP_CSR, stripCSRRegisterValue_);
702 }
703 
704 //========================================================================================================================
705 void FSSROtsFirmware::setPacketSizeStripCSR(uint32_t size)
706 {
707  if (size > 31)
708  std::cout << __COUT_HDR_FL__
709  << "ERROR: Maximum packet size is 31 while here you are trying to set "
710  << size << " packets!" << std::endl;
711  BitManipulator::insertBits(stripCSRRegisterValue_, size, 3, 5);
712  //write(buffer,STRIP_CSR, stripSCRRegisterValue_);
713 }
714 
715 //========================================================================================================================
716 void FSSROtsFirmware::enableChannelsStripCSR(bool channel0, bool channel1,
717  bool channel2, bool channel3, bool channel4, bool channel5)
718 {
719  BitManipulator::insertBits(stripCSRRegisterValue_, ((uint32_t) channel0)
720  + ((uint32_t) channel1 << 1) + ((uint32_t) channel2 << 2)
721  + ((uint32_t) channel3 << 3) + ((uint32_t) channel4 << 4)
722  + ((uint32_t) channel5 << 5), 8, 6);
723 }
724 
725 //========================================================================================================================
726 void FSSROtsFirmware::setExternalBCOClockSourceStripCSR(std::string clockSource)
727 {
728  if (clockSource == "External")
729  BitManipulator::insertBits(stripCSRRegisterValue_, 1, 16, 1);
730  else if (clockSource == "Internal")
731  BitManipulator::insertBits(stripCSRRegisterValue_, 0, 16, 1);
732 }
733 
734 //========================================================================================================================
735 void FSSROtsFirmware::setHaltStripCSR(bool set)
736 {
737  BitManipulator::insertBits(stripCSRRegisterValue_, (uint32_t) set, 17, 1);
738 }
739 
740 //========================================================================================================================
741 void FSSROtsFirmware::enableBCOStripCSR(bool enable)
742 {
743  BitManipulator::insertBits(stripCSRRegisterValue_, (uint32_t) enable, 19, 1);
744 }
745 
746 //========================================================================================================================
747 void FSSROtsFirmware::flushBuffersStripCSR(void)
748 {
749  BitManipulator::insertBits(stripCSRRegisterValue_, 1, 20, 1);
750 }
751 
752 //========================================================================================================================
753 void FSSROtsFirmware::resetTriggerCounterStripCSR(std::string& buffer)
754 {
755  BitManipulator::insertBits(stripCSRRegisterValue_, 1, 21, 1);
756  OtsUDPFirmwareCore::write(buffer, STRIP_CSR, stripCSRRegisterValue_);
757 
758  BitManipulator::insertBits(stripCSRRegisterValue_, 0, 21, 1);
759  OtsUDPFirmwareCore::write(buffer, STRIP_CSR, stripCSRRegisterValue_);
760 }
761 
762 //========================================================================================================================
763 void FSSROtsFirmware::resetBCOCounterStripCSR(void)
764 {
765  BitManipulator::insertBits(stripCSRRegisterValue_, 1, 22, 1);
766 }
767 
768 //========================================================================================================================
769 void FSSROtsFirmware::enableTriggerStripCSR(bool enable)
770 {
771  BitManipulator::insertBits(stripCSRRegisterValue_, (uint32_t) enable, 23, 1);
772 }
773 
774 //========================================================================================================================
775 void FSSROtsFirmware::sendTriggerDataStripCSR(bool send)
776 {
777  BitManipulator::insertBits(stripCSRRegisterValue_, (uint32_t) send, 24, 1);
778 }
779 
780 //========================================================================================================================
781 void FSSROtsFirmware::sendTriggerNumberStripCSR(bool send)
782 {
783  BitManipulator::insertBits(stripCSRRegisterValue_, (uint32_t) send, 25, 1);
784 }
785 
786 //========================================================================================================================
787 void FSSROtsFirmware::sendBCOStripCSR(bool send)
788 {
789  BitManipulator::insertBits(stripCSRRegisterValue_, (uint32_t) send, 26, 1);
790 }
791 
792 //========================================================================================================================
793 void FSSROtsFirmware::enableStreamStripCSR(bool enable)
794 {
795  BitManipulator::insertBits(stripCSRRegisterValue_, (uint32_t) enable, 27, 1);
796 }
797 
798 //========================================================================================================================
799 void FSSROtsFirmware::resetDCMStripCSR(bool clear)
800 {
801  BitManipulator::insertBits(stripCSRRegisterValue_, (uint32_t) clear, 31, 1);
802 }
803 
804 //========================================================================================================================
805 uint32_t FSSROtsFirmware::waitDCMResetStripCSR(void)
806 {
807  uint32_t bitToCheck = 0;
808  BitManipulator::insertBits(bitToCheck, 1, 31, 2);
809  return bitToCheck;
810 }
811 
812 //========================================================================================================================
813 void FSSROtsFirmware::resetDAC(void)
814 {
815  BitManipulator::insertBits(stripResetRegisterValue_, 1, 27, 1);
816 }
817 
818 //========================================================================================================================
819 void FSSROtsFirmware::resetLink(bool channel0, bool channel1, bool channel2,
820  bool channel3, bool channel4, bool channel5)
821 {
822  stripResetRegisterValue_ = 0;
823  BitManipulator::insertBits(stripResetRegisterValue_,
824  ((uint32_t) channel0) + ((uint32_t) channel1 << 1)
825  + ((uint32_t) channel2 << 2) + ((uint32_t) channel3 << 3)
826  + ((uint32_t) channel4 << 4) + ((uint32_t) channel5 << 5),
827  0, 6);
828  BitManipulator::insertBits(stripResetRegisterValue_, 1, 29, 1);
829 
830  // write(buffer, STRIP_RESET, (1<<28) +
831  // ((uint32_t)channel0) +
832  // ((uint32_t)channel1<<1) +
833  // ((uint32_t)channel2<<2) +
834  // ((uint32_t)channel3<<3) +
835  // ((uint32_t)channel4<<4) +
836  // ((uint32_t)channel5<<5)
837  // );
838 
839 }
840 
841 //========================================================================================================================
842 void FSSROtsFirmware::clearErrors(bool channel0, bool channel1, bool channel2,
843  bool channel3, bool channel4, bool channel5)
844 {
845  stripResetRegisterValue_ = 0;
846  BitManipulator::insertBits(stripResetRegisterValue_,
847  ((uint32_t) channel0) + ((uint32_t) channel1 << 1)
848  + ((uint32_t) channel2 << 2) + ((uint32_t) channel3 << 3)
849  + ((uint32_t) channel4 << 4) + ((uint32_t) channel5 << 5),
850  0, 6);
851  BitManipulator::insertBits(stripResetRegisterValue_, 1, 29, 1);
852 }
853 
854 //========================================================================================================================
855 void FSSROtsFirmware::clearFIFO(bool channel0, bool channel1, bool channel2,
856  bool channel3, bool channel4, bool channel5)
857 {
858  stripResetRegisterValue_ = 0;
859  BitManipulator::insertBits(stripResetRegisterValue_,
860  ((uint32_t) channel0) + ((uint32_t) channel1 << 1)
861  + ((uint32_t) channel2 << 2) + ((uint32_t) channel3 << 3)
862  + ((uint32_t) channel4 << 4) + ((uint32_t) channel5 << 5),
863  0, 6);
864  BitManipulator::insertBits(stripResetRegisterValue_, 1, 30, 1);
865 }
866 
867 //========================================================================================================================
868 void FSSROtsFirmware::resetChip(bool channel0, bool channel1, bool channel2,
869  bool channel3, bool channel4, bool channel5)
870 {
871  stripResetRegisterValue_ = 0;
872  BitManipulator::insertBits(stripResetRegisterValue_,
873  ((uint32_t) channel0) + ((uint32_t) channel1 << 1)
874  + ((uint32_t) channel2 << 2) + ((uint32_t) channel3 << 3)
875  + ((uint32_t) channel4 << 4) + ((uint32_t) channel5 << 5),
876  0, 6);
877  BitManipulator::insertBits(stripResetRegisterValue_, 1, 31, 1);
878 }
879 
880 //========================================================================================================================
881 void FSSROtsFirmware::setFrequencyRatio(std::string& buffer, int numerator, int denominator)
882 {
883  //The device need to load numerator minus one and denominator minus one, with an internal address of 0x50 and 052 respectively
884  OtsUDPFirmwareCore::write(buffer, STRIP_BCO_DCM, 0x80500000 + (numerator - 1)); // Set BCOCLK numerator // was 0x80500003
885  //FIXME? Does Nothing RAR Aug 2017//OtsUDPFirmwareCore::waitClear(buffer, STRIP_BCO_DCM, 0xf0000000); // Wait DCM write to finish // was 0x80000000
886 
887  OtsUDPFirmwareCore::write(buffer, STRIP_BCO_DCM, 0x80520000 + (denominator - 1)); // Set BCOCLK denominator // was 0x80520001
888  //FIXME? Does Nothing RAR Aug 2017//OtsUDPFirmwareCore::waitClear(buffer, STRIP_BCO_DCM, 0xf0000000); // Wait DCM write to finish - BCO frequency should be 13.513 MHz // was 0x80000000
889 }
890 
891 //========================================================================================================================
892 void FSSROtsFirmware::BCOOffset(uint32_t offset)
893 {
894  BitManipulator::insertBits(stripTriggerCSRRegisterValue_, offset, 0, 4);
895 }
896 
897 //========================================================================================================================
898 void FSSROtsFirmware::selectSpyFIFO(uint32_t input)
899 {
900  BitManipulator::insertBits(stripTriggerCSRRegisterValue_, input, 4, 3);
901 }
902 
903 //========================================================================================================================
904 void FSSROtsFirmware::halt(bool halt)
905 {
906  BitManipulator::insertBits(stripTriggerCSRRegisterValue_, (uint32_t) halt, 7, 1);
907 }
908 
909 //========================================================================================================================
910 void FSSROtsFirmware::configureStripTriggerUnbiased(std::string& buffer)
911 {
912  OtsUDPFirmwareCore::write(buffer, STRIP_TRIG_UNBIASED, 0x002805c); // Configure unbiased trigger
913 }
914 
915 //========================================================================================================================
916 void FSSROtsFirmware::configureTriggerInputs(std::string& buffer)
917 {
918  OtsUDPFirmwareCore::write(buffer, STRIP_TRIG_INPUT_0, 0x3f440000); // FSSR GOTHIT trigger input channel 0,1
919  OtsUDPFirmwareCore::write(buffer, STRIP_TRIG_INPUT_1, 0x3f440000); // FSSR GOTHIT trigger input channel 2,3
920  OtsUDPFirmwareCore::write(buffer, STRIP_TRIG_INPUT_2, 0x0); // FSSR GOTHIT trigger input channel 4,5
921 }
922 
923 //========================================================================================================================
924 std::string FSSROtsFirmware::resetSlaveBCO(void)
925 {
926  std::string buffer;
927  OtsUDPFirmwareCore::write(buffer, (uint64_t)0xc5000000, (uint64_t)0x00000008);
928  return buffer;
929 }
930 
931  //========================================================================================================================
932  void FSSROtsFirmware::chipID(uint32_t size)
933  {
934  BitManipulator::insertBits(stripSCRegisterValue_, size, 0, 5);
935  }
936 
937  //========================================================================================================================
938  void FSSROtsFirmware::addressSlowControls(uint32_t size)
939  {
940  BitManipulator::insertBits(stripSCRegisterValue_, size, 5, 5);
941  }
942 
943  //========================================================================================================================
944  void FSSROtsFirmware::instructionSlowControls(uint32_t size)
945  {
946  BitManipulator::insertBits(stripSCRegisterValue_, size, 10, 3);
947  }
948 
949  //========================================================================================================================
950  void FSSROtsFirmware::channelreadSelect(uint32_t size)
951  {
952  BitManipulator::insertBits(stripSCRegisterValue_, size, 13, 3);
953  }
954 
955  //========================================================================================================================
956  void FSSROtsFirmware::channelMask(uint32_t size)
957  {
958  BitManipulator::insertBits(stripSCRegisterValue_, size, 16, 8);
959  }
960 
961  //========================================================================================================================
962  void FSSROtsFirmware::bitsLength(uint32_t length)
963  {
964  BitManipulator::insertBits(stripSCRegisterValue_, length, 26, 3);
965  }
966 
967 
968  //========================================================================================================================
969  void FSSROtsFirmware::syncFallingBCO(bool sync)
970  {
971  BitManipulator::insertBits(stripSCRegisterValue_, (uint32_t)sync, 28, 1);
972  }
973 
974  //========================================================================================================================
975  void FSSROtsFirmware::syncRisingBCO(bool sync)
976  {
977  BitManipulator::insertBits(stripSCRegisterValue_, (uint32_t)sync, 29, 1);
978  }
979 
980  //========================================================================================================================
981  void FSSROtsFirmware::setRaw(bool set)
982  {
983  BitManipulator::insertBits(stripSCRegisterValue_, (uint32_t)set, 30, 1);
984  }
985 
986  //========================================================================================================================
987  void FSSROtsFirmware::initSlowControls(bool init)
988  {
989  BitManipulator::insertBits(stripSCRegisterValue_, (uint32_t)init, 31, 1);
990  }
991 
992  //========================================================================================================================
993  void FSSROtsFirmware::resetCount(bool reset)
994  {
995  BitManipulator::insertBits(stripAnalysisCSRRegisterValue_, (uint32_t)reset, 30, 1);
996  }
997 
998  //========================================================================================================================
999  void FSSROtsFirmware::setBCO_0(uint32_t void FSSROtsFirmware::BCOOffset(uint32_t offset)
1000  {
1001  BitManipulator::insertBits(stripTrigCSRRegisterValue_, offset, 0, 4);
1002  }input)
1003  {
1004  BitManipulator::insertBits(trigInputRegisterValue_, input, 0, 8);
1005  }
1006 
1007  //========================================================================================================================
1008  void FSSROtsFirmware::setBCO_1(uint32_t input)
1009  {
1010  BitManipulator::insertBits(trigInputRegisterValue_, input, 8, 8);
1011  }
1012 
1013  //========================================================================================================================
1014  void FSSROtsFirmware::trimFracBCO_0(uint32_t input)
1015  {
1016  BitManipulator::insertBits(trigInputRegisterValue_, input, 16, 4);
1017  }
1018 
1019  //========================================================================================================================
1020  void FSSROtsFirmware::trimFracBCO_1(uint32_t input)
1021  {
1022  BitManipulator::insertBits(trigInputRegisterValue_, input, 20, 4);
1023  }
1024 
1025  //========================================================================================================================
1026  void FSSROtsFirmware::enable_0(bool enable)
1027  {
1028  BitManipulator::insertBits(trigInputRegisterValue_, (uint32_t)enable, 28, 1);
1029  }
1030 
1031  //========================================================================================================================
1032  void FSSROtsFirmware::enable_1(bool enable)
1033  {
1034  BitManipulator::insertBits(trigInputRegisterValue_, (uint32_t)enable, 29, 1);
1035  }
1036 
1037  */