00001 #include "otsdaq-components/DAQHardware/FSSROtsFirmware.h" 00002 00003 //#include "otsdaq-components/DAQHardware/FSSRFirmwareDefinitions.h" 00004 //#include "otsdaq-core/BitManipulator/BitManipulator.h" 00005 //#include "otsdaq-components/DetectorHardware/FSSRROCDefinitions.h" 00006 00007 #include "otsdaq-components/DAQHardware/FrontEndFirmwareBase.h" 00008 #include "otsdaq-components/DAQHardware/PurdueFirmwareCore.h" 00009 #include "otsdaq-components/DAQHardware/OtsUDPFirmwareCore.h" 00010 00011 00012 #include "otsdaq-core/MessageFacility/MessageFacility.h" 00013 #include "otsdaq-core/Macros/CoutMacros.h" 00014 #include <sys/socket.h> 00015 #include <netinet/in.h> 00016 #include <arpa/inet.h> 00017 00018 #include <iostream> 00019 #include <cstdlib> 00020 00021 using namespace ots; 00022 00023 00024 //======================================================================================================================== 00025 FSSROtsFirmware::FSSROtsFirmware(std::string communicationFirmwareType, 00026 unsigned int communicationFirmwareVersion, 00027 unsigned int applicationFirmwareVersion) 00028 : FSSRFirmwareBase (communicationFirmwareType,communicationFirmwareVersion,applicationFirmwareVersion) 00029 {} 00030 // //choose: OtsUDPFirmwareCore or PurdueFirmwareCore 00031 // if(communicationFirmwareType == FrontEndFirmwareBase::PURDUE_CORE_FIRMWARE_NAME) 00032 // communicationFirmwareInstance_ = new PurdueFirmwareCore(communicationFirmwareVersion); 00033 // if(communicationFirmwareType == FrontEndFirmwareBase::OTS_CORE_FIRMWARE_NAME) 00034 // communicationFirmwareInstance_ = new OtsUDPFirmwareCore(communicationFirmwareVersion); 00035 // else 00036 // { 00037 // __SS__ << "Unknown firmware type choice: " << choice << std::endl; 00038 // __COUT_ERR__ << ss.str(); 00039 // __SS_THROW__; 00040 // } 00041 // 00042 // 00043 // //make protocol a class member 00044 // //protocolInstance_ = new OtsFirmwareCore(version);//AUG-17-2017 RAR dissociated because function calls are entirely independent from PURDUE firmware calls // //FrontEndFirmwareBase::getInstance(type,version); 00045 // //assert(protocolInstance_ != NULL); 00046 // //returns either new OtsUDPFirmware or new PurdueFirmwareCore, 00047 // //now we can call write/read etc with protocol->write, protocol->read, etc 00048 //} 00049 00050 //======================================================================================================================== 00051 FSSROtsFirmware::~FSSROtsFirmware(void) 00052 { 00053 //delete protocolInstance_; 00054 //protocolInstance_ = NULL; 00055 } 00056 00057 //======================================================================================================================== 00058 void FSSROtsFirmware::init(void) 00059 { } 00060 00061 /* 00062 //======================================================================================================================== 00063 std::string FSSROtsFirmware::configureClocks(std::string source, double frequency) 00064 { 00065 std::cout << __COUT_HDR_FL__ << "Writing Clock configuration!" << std::endl; 00066 00067 std::string buffer; 00068 //NoNeedNowwrite(buffer, ETHIO_DESTINATION_PORT, 0x0000b798); // Listen port for ethio stuff 00069 00070 setPacketSizeStripCSR(6); 00071 setExternalBCOClockSourceStripCSR(source); //(source) 00072 OtsUDPFirmwareCore::write(buffer, STRIP_CSR, stripCSRRegisterValue_); // Reset CSR - reset trigger counter, external 27 MHz clock 00073 00074 resetDCMStripCSR(true); 00075 OtsUDPFirmwareCore::write(buffer, STRIP_CSR, stripCSRRegisterValue_); // Set reset to DCM 00076 00077 resetDCMStripCSR(false); 00078 OtsUDPFirmwareCore::write(buffer, STRIP_CSR, stripCSRRegisterValue_); // Clear reset to DCM 00079 00080 ; 00081 //FIXME? Does Nothing RAR Aug 2017// OtsUDPFirmwareCore::waitClear(buffer, STRIP_CSR, waitDCMResetStripCSR()); // Wait for DCM to lock 00082 00083 OtsUDPFirmwareCore::write(buffer, STRIP_TRIM_CSR, 0x00002000); // MCLKB edge for channel 5 // was 0x00002000 00084 00085 setFrequencyFromClockState(buffer, frequency); 00086 OtsUDPFirmwareCore::write(buffer, STRIP_CSR, stripCSRRegisterValue_); 00087 00088 resetDCMStripCSR(true); 00089 OtsUDPFirmwareCore::write(buffer, STRIP_CSR, stripCSRRegisterValue_); 00090 00091 resetDCMStripCSR(false); 00092 OtsUDPFirmwareCore::write(buffer, STRIP_CSR, stripCSRRegisterValue_); 00093 00094 //FIXME? Does Nothing RAR Aug 2017//OtsUDPFirmwareCore::waitClear(buffer, STRIP_CSR, waitDCMResetStripCSR()); // Wait for DCM to lock 00095 std::cout << __COUT_HDR_FL__ << "stripCSRRegisterValue :" << std::hex << stripCSRRegisterValue_ << std::dec << std::endl; 00096 00097 return buffer; 00098 } 00099 00100 //======================================================================================================================== 00101 std::string FSSROtsFirmware::resetDetector(int channel) 00102 { 00103 std::cout << __COUT_HDR_FL__ << "Resetting detector!" << std::endl; 00104 std::string buffer; 00105 if (channel == -1)//reset all channels 00106 { 00107 //write(buffer,STRIP_RESET,0xd000003f); // Issue reset 00108 OtsUDPFirmwareCore::write(buffer, STRIP_RESET, 0xf000003f); // Issue reset // was 0xf000003f 00109 //FIXME? Does Nothing RAR Aug 2017//OtsUDPFirmwareCore::waitClear(buffer, STRIP_RESET, 0xf0000000); // Wait for reset to complete // was 0xf0000000 00110 } else 00111 { 00112 OtsUDPFirmwareCore::write(buffer, STRIP_RESET, 0xf000003f); // Issue reset 00113 //FIXME? Does Nothing RAR Aug 2017//OtsUDPFirmwareCore::waitClear(buffer, STRIP_RESET, 0xf0000000); // Wait for reset to complete 00114 } 00115 00116 return buffer; 00117 } 00118 00119 //======================================================================================================================== 00120 std::string FSSROtsFirmware::enableTrigger(void) 00121 { 00122 std::string buffer; 00123 std::cout << __COUT_HDR_FL__ << "Enabling Trigger!!!" << std::endl; 00124 std::cout << __COUT_HDR_FL__ << "stripCSRRegisterValue in :" << std::hex << stripCSRRegisterValue_ << std::dec << std::endl; 00125 00126 setHaltStripCSR(1);//WARNING THIS IS CLEARED BY THE MASTER BUT IF THERE IS NO MASTER NOTHING WORKS UNLESS THE BIT IS UNSET 00127 //setHaltStripCSR(0);//WARNING THIS IS CLEARED BY THE MASTER BUT IF THERE IS NO MASTER NOTHING WORKS UNLESS THE BIT IS UNSET 00128 sendTriggerDataStripCSR(true); 00129 sendTriggerNumberStripCSR(true); 00130 sendBCOStripCSR(true); 00131 OtsUDPFirmwareCore::write(buffer, STRIP_CSR, stripCSRRegisterValue_); 00132 00133 stripTriggerCSRRegisterValue_ = 0; 00134 BCOOffset(4); 00135 OtsUDPFirmwareCore::write(buffer, STRIP_TRIG_CSR, stripTriggerCSRRegisterValue_); // BCO offset // was 0x00000004 00136 00137 // write(buffer,STRIP_TRIG_INPUT_0,0x1f060040); // FSSR GOTHIT trigger input - timed in for the 27 MHz external clock 00138 // write(buffer,STRIP_TRIG_INPUT_3,0x3f874040); // Unbiased trigger input + external trigger 00139 00140 configureStripTriggerUnbiased(buffer); 00141 00142 configureTriggerInputs(buffer); 00143 00144 //FIXME for IP .36 the number to set is 0x20401000 00145 00146 if (OtsUDPFirmwareCore::version_ == 1) 00147 OtsUDPFirmwareCore::write(buffer, STRIP_TRIG_INPUT_3, 0x20401000); // Turn on streaming hits along with BCO data 00148 else if (OtsUDPFirmwareCore::version_ == 2) 00149 OtsUDPFirmwareCore::write(buffer, STRIP_TRIG_INPUT_3, 0x20301000); // Turn on streaming hits along with BCO data 00150 else 00151 { 00152 __SS__ << "what version is this?" << 00153 OtsUDPFirmwareCore::version_ << std::endl; 00154 __COUT_ERR__ << "\n" << ss.str(); 00155 __SS_THROW__; 00156 } 00157 std::cout << __COUT_HDR_FL__ << "stripCSRRegisterValue out:" << std::hex << stripCSRRegisterValue_ << std::dec << std::endl; 00158 std::cout << __COUT_HDR_FL__ << "Done enabling Trigger!!!" << std::endl; 00159 00160 return buffer; 00161 } 00162 00163 //======================================================================================================================== 00164 void FSSROtsFirmware::readBurstDestinationIP(std::string& buffer) 00165 { 00166 OtsUDPFirmwareCore::read(buffer, (uint64_t)0x0000000100000006); 00167 } 00168 00169 //======================================================================================================================== 00170 void FSSROtsFirmware::readBurstDestinationMAC(std::string& buffer) 00171 { 00172 OtsUDPFirmwareCore::read(buffer, (uint64_t)0x0000000100000007); 00173 } 00174 00175 //======================================================================================================================== 00176 void FSSROtsFirmware::readBurstDestinationPort(std::string& buffer) 00177 { 00178 OtsUDPFirmwareCore::read(buffer, (uint64_t)0x0000000100000008); 00179 } 00180 00181 //======================================================================================================================== 00182 void FSSROtsFirmware::writeBurstDestinationIP(std::string& buffer, const uint64_t value) 00183 { 00184 OtsUDPFirmwareCore::write(buffer, (uint64_t)0x0000000100000006, value); 00185 } 00186 00187 //======================================================================================================================== 00188 void FSSROtsFirmware::writeBurstDestinationMAC(std::string& buffer, const uint64_t value) 00189 { 00190 OtsUDPFirmwareCore::write(buffer, (uint64_t)0x0000000100000007, value); 00191 } 00192 00193 //======================================================================================================================== 00194 void FSSROtsFirmware::writeBurstDestinationPort(std::string& buffer, const uint64_t value) 00195 { 00196 OtsUDPFirmwareCore::write(buffer, 0x0000000100000008, value); 00197 } 00198 00199 //======================================================================================================================== 00200 std::string FSSROtsFirmware::resetBCO(void) 00201 { 00202 std::cout << __COUT_HDR_FL__ << "Reset BCO!!!" << std::endl; 00203 std::cout << __COUT_HDR_FL__ << "stripCSRRegisterValue in :" << std::hex << stripCSRRegisterValue_ << std::dec << std::endl; 00204 std::string buffer; 00205 00206 resetTriggerCounterStripCSR(buffer); 00207 //write(buffer, STRIP_CSR, stripCSRRegisterValue_);//the write is done in the reset 00208 std::cout << __COUT_HDR_FL__ << "stripCSRRegisterValue :" << std::hex << stripCSRRegisterValue_ << std::dec << std::endl; 00209 00210 //msg->Write(STRIP_SC_CSR,0x90000b95|(chmask<<16)); 00211 //write(buffer,STRIP_SC_CSR,0x900f0b95);// This is the <SCR,set> command with the bit set to sync SHIFT with BCO=0. 00212 00213 00214 enableBCOStripCSR(true); 00215 OtsUDPFirmwareCore::write(buffer, STRIP_CSR, stripCSRRegisterValue_); 00216 std::cout << __COUT_HDR_FL__ << "stripCSRRegisterValue out:" << std::hex << stripCSRRegisterValue_ << std::dec << std::endl; 00217 std::cout << __COUT_HDR_FL__ << "Done reset BCO!!!" << std::endl; 00218 00219 return buffer; 00220 } 00221 00222 //======================================================================================================================== 00223 std::string FSSROtsFirmware::startStream(bool channel0, bool channel1, bool channel2, bool channel3, bool channel4, bool channel5) 00224 { 00225 std::cout << __COUT_HDR_FL__ << "Start Stream!" << std::endl; 00226 std::cout << __COUT_HDR_FL__ << "stripCSRRegisterValue in:" << std::hex << stripCSRRegisterValue_ << std::dec << std::endl; 00227 std::string buffer; 00228 00229 std::cout << __COUT_HDR_FL__ << " channel0 " << channel0 << " channel1 " << channel1 << " channel2 " << channel2 << " channel3 " << channel3 << " channel4 " << channel4 << " channel5 " << channel5 << std::endl; 00230 00231 enableChannelsStripCSR(channel0, channel1, channel2, channel3, channel4, channel5); 00232 // if (version_ == 1) 00233 // enableChannelsStripCSR(true, true, true, true, false, false); 00234 // else if (version_ == 2) 00235 // enableChannelsStripCSR(true, true, true, true, true, true); 00236 00237 enableStreamStripCSR(true); // Turn on streaming hits along with BCO data // was 0x0f000f30 00238 OtsUDPFirmwareCore::write(buffer, STRIP_CSR, stripCSRRegisterValue_); 00239 00240 std::cout << __COUT_HDR_FL__ << "stripCSRRegisterValue out:" << std::hex << stripCSRRegisterValue_ << std::dec << std::endl; 00241 std::cout << __COUT_HDR_FL__ << "Done start Stream!" << std::endl; 00242 00243 return buffer; 00244 } 00245 00246 //======================================================================================================================== 00247 std::string FSSROtsFirmware::stopStream(void) 00248 { 00249 std::string buffer; 00250 enableChannelsStripCSR(false, false, false, false, false, false); 00251 enableStreamStripCSR(false); 00252 OtsUDPFirmwareCore::write(buffer, STRIP_CSR, stripCSRRegisterValue_); 00253 return buffer; 00254 } 00255 00256 //======================================================================================================================== 00257 void FSSROtsFirmware::makeDACSequence(FirmwareSequence<uint64_t>& sequence, 00258 unsigned int channel, const ROCStream& rocStream) 00259 { 00260 const ROCDACs& rocDACs = rocStream.getROCDACs(); 00261 for (DACList::const_iterator it = rocDACs.getDACList().begin(); it 00262 != rocDACs.getDACList().end(); it++) 00263 { 00264 //if(it->first != "SendData" && it->first != "RejectHits") continue; 00265 uint64_t data = FSSRROCDefinitions::makeDACWriteCommand( 00266 rocStream.getFEWROCAddress(), it->first, it->second.second); 00267 sequence.pushBack(ChannelFIFOAddress[channel], data); 00268 sequence.pushBack(ChannelFIFOAddress[channel], 00269 BitManipulator::insertBits(data, (uint64_t) 0x48, 56, 8)); 00270 //set WRITE 00271 sequence.pushBack(ChannelFIFOAddress[channel], 00272 BitManipulator::insertBits(data, (uint64_t) 1, 60, 1)); 00273 //clr WRITE 00274 sequence.pushBack(ChannelFIFOAddress[channel], 00275 BitManipulator::insertBits(data, (uint64_t) 0, 60, 1)); 00276 //clr TALK 00277 sequence.pushBack(ChannelFIFOAddress[channel], 00278 BitManipulator::insertBits(data, (uint64_t) 0, 62, 1)); 00279 sequence.pushBack(ChannelFIFOAddress[channel], 00280 BitManipulator::insertBits(data, (uint64_t) 0x40, 56, 8)); 00281 //break; 00282 } 00283 } 00284 00285 //======================================================================================================================== 00286 void FSSROtsFirmware::makeDACSequence(FirmwareSequence<uint32_t>& sequence, 00287 unsigned int channel, const ROCStream& rocStream) 00288 { 00289 const ROCDACs& rocDACs = rocStream.getROCDACs(); 00290 for (DACList::const_iterator it = rocDACs.getDACList().begin(); it 00291 != rocDACs.getDACList().end(); it++) 00292 { 00293 //RYAN 00294 //if(it->first != "SendData" && it->first != "RejectHits") continue; 00295 uint64_t data = FSSRROCDefinitions::makeDACWriteCommand(rocStream.getFEWROCAddress(), it->first, it->second.second); 00296 //sequence.pushBack(ChannelFIFOAddress[channel], data); 00297 //sequence.pushBack(ChannelFIFOAddress[channel], BitManipulator::insertBits(data,(uint32_t)0x48,56,8)); 00298 //set WRITE 00299 //sequence.pushBack(ChannelFIFOAddress[channel], BitManipulator::insertBits(data,(uint32_t)1,60,1)); 00300 //clr WRITE 00301 //sequence.pushBack(ChannelFIFOAddress[channel], BitManipulator::insertBits(data,(uint32_t)0,60,1)); 00302 //clr TALK 00303 //sequence.pushBack(ChannelFIFOAddress[channel], BitManipulator::insertBits(data,(uint32_t)0,62,1)); 00304 //sequence.pushBack(ChannelFIFOAddress[channel], BitManipulator::insertBits(data,(uint32_t)0x40,56,8)); 00305 00306 00307 //if(it->first != "SendData" && it->first != "RejectHits") continue; 00308 uint32_t data = FSSRROCDefinitions::makeDACWriteHeader( 00309 rocStream.getFEWROCAddress(), it->first); 00310 //Insert channel 00311 BitManipulator::insertBits(data, 1, 16 + channel, 1); 00312 sequence.pushBack(ChannelFIFOAddress[channel], it->second.second); 00313 std::cout << __COUT_HDR_FL__ << __PRETTY_FUNCTION__ << "Register: " << it->first << " value: " 00314 << it->second.second << std::hex << " -> Data: " << data << std::dec 00315 << std::endl; 00316 sequence.pushBack(STRIP_SC_CSR, data); 00317 } 00318 } 00319 00320 //======================================================================================================================== 00321 void FSSROtsFirmware::makeDACBuffer(std::string& buffer, 00322 unsigned int channel, const ROCStream& rocStream) 00323 { 00324 std::cout << __COUT_HDR_FL__ << __PRETTY_FUNCTION__ << "Channel: " << channel << std::endl; 00325 const ROCDACs& rocDACs = rocStream.getROCDACs(); 00326 for (DACList::const_iterator it = rocDACs.getDACList().begin(); it != rocDACs.getDACList().end(); it++) 00327 { 00328 std::string bufferElement; 00329 //FIXME? Does Nothing RAR Aug 2017//OtsUDPFirmwareCore::waitClear(bufferElement, STRIP_SC_CSR, 0x80000000); 00330 uint32_t registerHeader = 0; 00331 //FIXME This must go in the FSSRROCDefinitions stuff 00332 if (it->first != "RejectHits" && it->first != "SendData") 00333 { 00334 OtsUDPFirmwareCore::write(bufferElement, ChannelFIFOAddress[channel], it->second.second); 00335 registerHeader = FSSRROCDefinitions::makeDACWriteHeader( 00336 rocStream.getFEWROCAddress(), it->first); 00337 //std::cout << __COUT_HDR_FL__ << __PRETTY_FUNCTION__ << "Register: " << it->first << " value: " << it->second.second << std::hex << " -> Data: " << registerHeader << std::dec << std::endl; 00338 //Insert channel 00339 BitManipulator::insertBits(registerHeader, 1, 16 + channel, 1); 00340 } 00341 else 00342 { 00343 if (it->second.second == 1 || it->second.second == 2) 00344 { 00345 registerHeader = FSSRROCDefinitions::makeDACSetHeader( 00346 rocStream.getFEWROCAddress(), it->first); 00347 //Insert channel 00348 BitManipulator::insertBits(registerHeader, 1, 16 + channel, 1); 00349 } 00350 else if (it->second.second == 0 || it->second.second == 5) 00351 { 00352 registerHeader = FSSRROCDefinitions::makeDACResetHeader( 00353 rocStream.getFEWROCAddress(), it->first); 00354 //Insert channel 00355 BitManipulator::insertBits(registerHeader, 1, 16 + channel, 1); 00356 } 00357 else 00358 std::cout << __COUT_HDR_FL__ << "Register value for : " << it->first 00359 << " doesn't have a value I expect -> value = " 00360 << it->second.second << std::endl; 00361 00362 } 00363 //std::cout << __COUT_HDR_FL__ << __PRETTY_FUNCTION__ << "Register: " << it->first << " value: " << it->second.second << std::hex << " -> Data: " << registerHeader << std::dec << std::endl; 00364 OtsUDPFirmwareCore::write(bufferElement, STRIP_SC_CSR, registerHeader); 00365 //FIXME? Does Nothing RAR Aug 2017//OtsUDPFirmwareCore::waitClear(bufferElement, STRIP_SC_CSR, 0x80000000); 00366 00367 //buffer.push_back(bufferElement); 00368 buffer += bufferElement; 00369 //break; 00370 } 00371 } 00372 00373 //======================================================================================================================== 00374 void FSSROtsFirmware:: makeDACBuffer(std::vector<std::string>& buffer, unsigned int channel, const ROCStream& rocStream) 00375 { 00376 00377 std::cout << __COUT_HDR_FL__ << "\tMaking DAC Buffer" << std::endl; 00378 00379 int limitCount = 0; 00380 unsigned int singleVectorCount = 0; 00381 00382 std::string alternateBuffer; 00383 00384 std::cout << __COUT_HDR_FL__ << __PRETTY_FUNCTION__ << "Channel: " << channel << std::endl; 00385 const ROCDACs& rocDACs = rocStream.getROCDACs(); 00386 //std::cout << __COUT_HDR_FL__ << __PRETTY_FUNCTION__ << "Number of DACs: " << rocDACs.getDACList().size() << std::endl; 00387 std::string bufferElement; 00388 for (DACList::const_iterator it = rocDACs.getDACList().begin(); it != rocDACs.getDACList().end(); it++) 00389 { 00390 //FIXME? Does Nothing RAR Aug 2017//OtsUDPFirmwareCore::waitClear(bufferElement, STRIP_SC_CSR, 0x80000000); 00391 uint32_t registerHeader = 0; 00392 //FIXME This must go in the FSSRROCDefinitions stuff 00393 if (it->first != "RejectHits" && it->first != "SendData") 00394 { 00395 OtsUDPFirmwareCore::write(bufferElement, ChannelFIFOAddress[channel], it->second.second); 00396 registerHeader = FSSRROCDefinitions::makeDACWriteHeader( 00397 rocStream.getFEWROCAddress(), it->first); 00398 std::cout << __COUT_HDR_FL__ << __PRETTY_FUNCTION__ << "Register: " << it->first << " value: " << it->second.second << std::hex << " -> Data: " << registerHeader << std::dec << std::endl; 00399 //Insert channel 00400 BitManipulator::insertBits(registerHeader, 1, 16 + channel, 1); 00401 } 00402 else 00403 { 00404 if (it->second.second == 1 || it->second.second == 2) 00405 { 00406 registerHeader = FSSRROCDefinitions::makeDACSetHeader( 00407 rocStream.getFEWROCAddress(), it->first); 00408 //Insert channel 00409 BitManipulator::insertBits(registerHeader, 1, 16 + channel, 1); 00410 } 00411 else if (it->second.second == 0 || it->second.second == 5) 00412 { 00413 registerHeader = FSSRROCDefinitions::makeDACResetHeader( 00414 rocStream.getFEWROCAddress(), it->first); 00415 //Insert channel 00416 BitManipulator::insertBits(registerHeader, 1, 16 + channel, 1); 00417 } 00418 else 00419 std::cout << __COUT_HDR_FL__ << "Register value for : " << it->first 00420 << " doesn't have a value I expect -> value = " 00421 << it->second.second << std::endl; 00422 00423 } 00424 //std::cout << __COUT_HDR_FL__ << __PRETTY_FUNCTION__ << "Register: " << it->first << " value: " << it->second.second << std::hex << " -> Data: " << registerHeader << std::dec << std::endl; 00425 OtsUDPFirmwareCore::write(bufferElement, STRIP_SC_CSR, registerHeader); 00426 //FIXME? Does Nothing RAR Aug 2017//OtsUDPFirmwareCore::waitClear(bufferElement, STRIP_SC_CSR, 0x80000000); 00427 00428 //alternateBuffer += bufferElement; 00429 limitCount++; 00430 singleVectorCount++; 00431 00432 if (limitCount == STIB_DAC_WRITE_MAX) 00433 { 00434 std::cout << __COUT_HDR_FL__ << "\tBuffer lenght:" << bufferElement.size() << std::endl; 00435 buffer.push_back(bufferElement); 00436 limitCount = 0; 00437 bufferElement.clear(); 00438 } 00439 else if (singleVectorCount == rocDACs.getDACList().size()) //case for imcomplete packet 00440 { 00441 buffer.push_back(bufferElement); 00442 } 00443 00444 //buffer.push_back(bufferElement); 00445 //break; 00446 } 00447 std::cout << __COUT_HDR_FL__ << "\tDone making DAC Buffer" << std::endl; 00448 00449 } 00450 00451 //======================================================================================================================== 00452 void FSSROtsFirmware::makeMaskBuffer(std::string& buffer, unsigned int channel, 00453 const ROCStream& rocStream) 00454 { 00455 std::cout << __COUT_HDR_FL__ << "Making mask! " << std::endl; 00456 makeMaskBuffer(buffer, channel, rocStream, "Kill"); 00457 // makeMaskSequence(buffer, channel, rocStream, "Inject"); 00458 } 00459 00460 //======================================================================================================================== 00461 void FSSROtsFirmware::makeMaskBuffer(std::string& buffer, unsigned int channel, const ROCStream& rocStream, const std::string& registerName) 00462 { 00463 std::cout << __COUT_HDR_FL__ << "\tMaking mask! " << std::endl; 00464 int chipId = rocStream.getFEWROCAddress(); 00465 std::string mask = rocStream.getROCMask(); 00466 std::cout << __COUT_HDR_FL__ << "\tMask length: " << mask.length() << std::endl; 00467 00468 unsigned int data[4] = { 0, 0, 0, 0 }; 00469 00470 char val; 00471 //int j = 0; 00472 for (unsigned int d = 0; d < 4; d++) 00473 { //d goes from 0 to 4. 4 bytes 00474 //std::cout << __COUT_HDR_FL__ << "---------------------" << d << "-------------------" << std::endl; 00475 for (unsigned int m = 0; m < 8 * 4; m++) 00476 { //m goes from 0 to 31, since each byte has 8 bits, there are 32 bits 00477 val = mask[(8 * 4 * d) + m]; //assigns to val the value of the corresponding bit. 0-31, 32-63, 64-95, 96-127. it goes through each of the 128 bits 00478 //std::cout << __COUT_HDR_FL__ << "---------------------" << j++ << std::endl; 00479 //std::cout << __COUT_HDR_FL__ << "data[" << d << "] before: " << std::hex << data[d] << std::dec << std::endl; 00480 data[d] |= (unsigned int) atoi(&val) << (8 * 4 - 1 - m); 00481 //std::cout << __COUT_HDR_FL__ << "(unsigned int) atoi(&val): " << (unsigned int) atoi(&val) << std::endl; 00482 //std::cout << __COUT_HDR_FL__ << "data[" << d << "] after: " << std::hex << data[d] << std::dec << std::endl; 00483 //std::cout << __COUT_HDR_FL__ << std::hex << "D: " << data[d] << " Val: " << (unsigned int)atoi(&val) << " index: " << std::dec << (8*4-1-m) << " bit: " << mask[(8*4*d)+m] << std::dec << std::endl; 00484 } 00485 // 00486 } 00487 00488 int i, ierr; 00489 unsigned int w; 00490 unsigned char len = 4; 00491 unsigned char addr = 17;//Kill 00492 unsigned char bitMask = 1 << channel; 00493 unsigned char inst = WRITE; 00494 00495 //FIXME? Does Nothing RAR Aug 2017//OtsUDPFirmwareCore::waitClear(buffer, STRIP_SC_CSR, 0x80000000); 00496 00497 for (i = 0; i < 4; i++) 00498 //write(buffer, STRIP_SCI + 4 * i, data[i]); 00499 OtsUDPFirmwareCore::write(buffer, STRIP_SCI + 4 * (4 - i - 1), data[i]); 00500 00501 w = 0x80000000 | (len << 24) | (bitMask << 16) | (inst << 10) | (addr << 5) | chipId; 00502 00503 //ierr = OtsUDPFirmwareCore::write(buffer, STRIP_SC_CSR, w); 00504 OtsUDPFirmwareCore::write(buffer, STRIP_SC_CSR, w); 00505 00506 //FIXME? Does Nothing RAR Aug 2017//OtsUDPFirmwareCore::waitClear(buffer, STRIP_SC_CSR, 0x80000000); 00507 } 00508 00509 //======================================================================================================================== 00510 void FSSROtsFirmware::makeMaskSequence(FirmwareSequence<uint64_t>& sequence, 00511 unsigned int channel, const ROCStream& rocStream) 00512 { 00513 std::cout << __COUT_HDR_FL__ << "Making mask! " << std::endl; 00514 makeMaskSequence(sequence, channel, rocStream, "Kill"); 00515 // makeMaskSequence(sequence, channel, rocStream, "Inject"); 00516 } 00517 00518 //======================================================================================================================== 00519 void FSSROtsFirmware::makeMaskSequence(FirmwareSequence<uint32_t>& sequence, 00520 unsigned int channel, const ROCStream& rocStream) 00521 { 00522 std::cout << __COUT_HDR_FL__ << "Making mask! " << std::endl; 00523 makeMaskSequence(sequence, channel, rocStream, "Kill"); 00524 // makeMaskSequence(channel,rocStream,sequence,"Inject"); 00525 } 00526 00527 //======================================================================================================================== 00528 void FSSROtsFirmware::makeMaskSequence(FirmwareSequence<uint64_t>& sequence, 00529 unsigned int channel, const ROCStream& rocStream, 00530 const std::string& registerName) 00531 { 00532 int chipId = rocStream.getFEWROCAddress();//9, 14 or 21 bcast 00533 std::string mask = rocStream.getROCMask(); 00534 std::cout << __COUT_HDR_FL__ << "Mask length: " << mask.length() << std::endl; 00535 00536 uint64_t uInt64Data = 0; 00537 std::string stringData = ""; 00538 00539 //have to manually set every bit for mask writes. 00540 //reset fifo 00541 //download every bit (shift_in and shift_ctrl) to fifo (setup muxes and control lines) 00542 //configure muxes for readout 00543 //commence readout 00544 00545 //FIFO Controls - byte 5 (7:0) 00546 //7 - FIFO Clock 00547 //6 - Shift Ctrl bit 00548 //MASK_CELL_H - Shift In bit 00549 //MUX Controls - byte 0 (7:0) 00550 //7 - Read En/Output MUX sel (1 for masks) 00551 //1 - Write En for mux 00552 //0 - Reset Fifo 00553 00554 //reset fifo 00555 BitManipulator::insertBits(uInt64Data, 0x1, 56, 8); 00556 sequence.pushBack(ChannelFIFOAddress[channel], uInt64Data); 00557 00558 //configure fifo for write 00559 BitManipulator::insertBits(uInt64Data, 0x2, 56, 8); 00560 sequence.pushBack(ChannelFIFOAddress[channel], uInt64Data); 00561 00562 //Download every bit (shift_in and shift_control) to fifo (setup muxes and control lines) 00563 //Bit 7 of data is FIFO clock, bit 6 is shift_control, bit 5 is shift_in 00564 //start bits (ctrl 0, data 0 => ctrl 1, data 0) 00565 00566 BitManipulator::insertBits(uInt64Data, 0x40, 16, 8);//(0<<7) | (1<<6) | (0<<5) 00567 sequence.pushBack(ChannelFIFOAddress[channel], uInt64Data); 00568 BitManipulator::insertBits(uInt64Data, 0xc0, 16, 8);//(1<<7) | (1<<6) | (0<<5) -> clock the data in the fifo 00569 sequence.pushBack(ChannelFIFOAddress[channel], uInt64Data); 00570 00571 stringData = FSSRROCDefinitions::makeMaskWriteCommand(chipId, 00572 registerName, mask); 00573 00574 uint8_t data; 00575 for (unsigned int s = 0; s < stringData.length(); s++) 00576 for (int b = 8 - 1; b >= 0 && (s * 8 + 8 - b < 13 + 128); b--) 00577 { 00578 //std::cout << __COUT_HDR_FL__ << "S: " << s << " val: " << stringData.data()[s] << " b: " << b << " bit: " << ((stringData.data()[s]>>b)&1) << std::endl; 00579 data = 0x40 | (((stringData.data()[s] >> b) & 1) << 5); 00580 BitManipulator::insertBits(uInt64Data, (uint64_t) data, 16, 8); 00581 sequence.pushBack(ChannelFIFOAddress[channel], uInt64Data); 00582 data |= 0x80; 00583 BitManipulator::insertBits(uInt64Data, (uint64_t) data, 16, 8); 00584 sequence.pushBack(ChannelFIFOAddress[channel], uInt64Data); 00585 } 00586 00587 //reset Shift Control 00588 BitManipulator::insertBits(uInt64Data, 0x0, 16, 8); 00589 sequence.pushBack(ChannelFIFOAddress[channel], uInt64Data); 00590 BitManipulator::insertBits(uInt64Data, 0x80, 16, 8); 00591 sequence.pushBack(ChannelFIFOAddress[channel], uInt64Data); 00592 00593 //configure muxes for readout 00594 BitManipulator::insertBits(uInt64Data, 0x0, 56, 8); 00595 sequence.pushBack(ChannelFIFOAddress[channel], uInt64Data); 00596 00597 //commence readout 00598 BitManipulator::insertBits(uInt64Data, 0x80, 56, 8); 00599 sequence.pushBack(ChannelFIFOAddress[channel], uInt64Data); 00600 00601 } 00602 00603 //======================================================================================================================== 00604 void FSSROtsFirmware::makeMaskSequence(FirmwareSequence<uint32_t>& sequence, 00605 unsigned int channel, const ROCStream& rocStream, 00606 const std::string& registerName) 00607 {} 00608 00609 //======================================================================================================================== 00610 std::string FSSROtsFirmware::readCSRRegister() 00611 { 00612 std::string buffer; 00613 OtsUDPFirmwareCore::read(buffer,STRIP_CSR); 00614 return buffer; 00615 } 00616 00617 //======================================================================================================================== 00618 void FSSROtsFirmware::setFrequencyFromClockState(std::string& buffer, double frequency) 00619 { 00620 std::cout << __COUT_HDR_FL__ << "Setting up clock frequency!!!" << std::endl; 00621 00622 int quotient; 00623 int numerator; 00624 int denominator; 00625 double realClockFrequency; 00626 00627 if (BitManipulator::readBits(stripCSRRegisterValue_, 17, 1) == 1) //if fastBCO is enabled 00628 quotient = 4; 00629 else //normal cases 00630 quotient = 8; 00631 00632 if (isClockStateExternal()) //base freq: 54MHz 00633 { 00634 realClockFrequency = EXTERNAL_CLOCK_FREQUENCY / quotient; //this is the REAL frequency being used 00635 } 00636 else //base freq: 66.667MHz 00637 { 00638 realClockFrequency = INTERNAL_CLOCK_FREQUENCY / quotient; //this is the REAL frequency being used 00639 } 00640 00641 double factor = frequency / realClockFrequency; 00642 00643 //The device needs the denominator and the denominator to be load into a 5 bit register 00644 //It will take two initial numerator and denominator bigger than necessary (to do not loose precision) 00645 //and divide them for their gcd. If they still do not fit in 5 bit, they are trunked (divided by 2) 00646 //untill they are less than 32 00647 numerator = factor * 100; //we will work with 2 digits precision after the decimal point 00648 denominator = 100; 00649 00650 do 00651 { 00652 //We will need the GCD at some point in order to simplify fractions //taken from other sources 00653 int gcd = numerator; 00654 int rest = denominator; 00655 int tmp; 00656 00657 while (rest != 0) 00658 { 00659 tmp = rest; 00660 rest = gcd % tmp; 00661 gcd = tmp; 00662 } 00663 //Done finding the GCD 00664 00665 if (gcd == 1) //if there's no GCD, just divide by 2 to find the nearest approssimation with less bits 00666 { 00667 numerator /= 2; 00668 denominator /= 2; 00669 } 00670 else 00671 { 00672 numerator /= gcd; 00673 denominator /= gcd; 00674 } 00675 00676 } 00677 while (denominator >= 32 || numerator >= 32); 00678 std::cout << __COUT_HDR_FL__ << "Numerator: " << numerator << std::endl; 00679 std::cout << __COUT_HDR_FL__ << "Denominator: " << denominator << std::endl; 00680 setFrequencyRatio(buffer, numerator, denominator); 00681 std::cout << __COUT_HDR_FL__ << "Done with clock frequency setup!!!" << std::endl; 00682 } 00683 //======================================================================================================================== 00684 bool FSSROtsFirmware::isClockStateExternal() //returns true if the clock state is External 00685 { 00686 if (BitManipulator::readBits(stripCSRRegisterValue_, 16, 1) == 1) 00687 return true; 00688 else 00689 return false; 00690 } 00691 00692 //======================================================================================================================== 00693 void FSSROtsFirmware::setCSRRegister(uint32_t total) 00694 { 00695 stripCSRRegisterValue_ = total; 00696 } 00697 00698 //======================================================================================================================== 00699 void FSSROtsFirmware::writeCSRRegister(std::string& buffer) 00700 { 00701 OtsUDPFirmwareCore::write(buffer, STRIP_CSR, stripCSRRegisterValue_); 00702 } 00703 00704 //======================================================================================================================== 00705 void FSSROtsFirmware::setPacketSizeStripCSR(uint32_t size) 00706 { 00707 if (size > 31) 00708 std::cout << __COUT_HDR_FL__ 00709 << "ERROR: Maximum packet size is 31 while here you are trying to set " 00710 << size << " packets!" << std::endl; 00711 BitManipulator::insertBits(stripCSRRegisterValue_, size, 3, 5); 00712 //write(buffer,STRIP_CSR, stripSCRRegisterValue_); 00713 } 00714 00715 //======================================================================================================================== 00716 void FSSROtsFirmware::enableChannelsStripCSR(bool channel0, bool channel1, 00717 bool channel2, bool channel3, bool channel4, bool channel5) 00718 { 00719 BitManipulator::insertBits(stripCSRRegisterValue_, ((uint32_t) channel0) 00720 + ((uint32_t) channel1 << 1) + ((uint32_t) channel2 << 2) 00721 + ((uint32_t) channel3 << 3) + ((uint32_t) channel4 << 4) 00722 + ((uint32_t) channel5 << 5), 8, 6); 00723 } 00724 00725 //======================================================================================================================== 00726 void FSSROtsFirmware::setExternalBCOClockSourceStripCSR(std::string clockSource) 00727 { 00728 if (clockSource == "External") 00729 BitManipulator::insertBits(stripCSRRegisterValue_, 1, 16, 1); 00730 else if (clockSource == "Internal") 00731 BitManipulator::insertBits(stripCSRRegisterValue_, 0, 16, 1); 00732 } 00733 00734 //======================================================================================================================== 00735 void FSSROtsFirmware::setHaltStripCSR(bool set) 00736 { 00737 BitManipulator::insertBits(stripCSRRegisterValue_, (uint32_t) set, 17, 1); 00738 } 00739 00740 //======================================================================================================================== 00741 void FSSROtsFirmware::enableBCOStripCSR(bool enable) 00742 { 00743 BitManipulator::insertBits(stripCSRRegisterValue_, (uint32_t) enable, 19, 1); 00744 } 00745 00746 //======================================================================================================================== 00747 void FSSROtsFirmware::flushBuffersStripCSR(void) 00748 { 00749 BitManipulator::insertBits(stripCSRRegisterValue_, 1, 20, 1); 00750 } 00751 00752 //======================================================================================================================== 00753 void FSSROtsFirmware::resetTriggerCounterStripCSR(std::string& buffer) 00754 { 00755 BitManipulator::insertBits(stripCSRRegisterValue_, 1, 21, 1); 00756 OtsUDPFirmwareCore::write(buffer, STRIP_CSR, stripCSRRegisterValue_); 00757 00758 BitManipulator::insertBits(stripCSRRegisterValue_, 0, 21, 1); 00759 OtsUDPFirmwareCore::write(buffer, STRIP_CSR, stripCSRRegisterValue_); 00760 } 00761 00762 //======================================================================================================================== 00763 void FSSROtsFirmware::resetBCOCounterStripCSR(void) 00764 { 00765 BitManipulator::insertBits(stripCSRRegisterValue_, 1, 22, 1); 00766 } 00767 00768 //======================================================================================================================== 00769 void FSSROtsFirmware::enableTriggerStripCSR(bool enable) 00770 { 00771 BitManipulator::insertBits(stripCSRRegisterValue_, (uint32_t) enable, 23, 1); 00772 } 00773 00774 //======================================================================================================================== 00775 void FSSROtsFirmware::sendTriggerDataStripCSR(bool send) 00776 { 00777 BitManipulator::insertBits(stripCSRRegisterValue_, (uint32_t) send, 24, 1); 00778 } 00779 00780 //======================================================================================================================== 00781 void FSSROtsFirmware::sendTriggerNumberStripCSR(bool send) 00782 { 00783 BitManipulator::insertBits(stripCSRRegisterValue_, (uint32_t) send, 25, 1); 00784 } 00785 00786 //======================================================================================================================== 00787 void FSSROtsFirmware::sendBCOStripCSR(bool send) 00788 { 00789 BitManipulator::insertBits(stripCSRRegisterValue_, (uint32_t) send, 26, 1); 00790 } 00791 00792 //======================================================================================================================== 00793 void FSSROtsFirmware::enableStreamStripCSR(bool enable) 00794 { 00795 BitManipulator::insertBits(stripCSRRegisterValue_, (uint32_t) enable, 27, 1); 00796 } 00797 00798 //======================================================================================================================== 00799 void FSSROtsFirmware::resetDCMStripCSR(bool clear) 00800 { 00801 BitManipulator::insertBits(stripCSRRegisterValue_, (uint32_t) clear, 31, 1); 00802 } 00803 00804 //======================================================================================================================== 00805 uint32_t FSSROtsFirmware::waitDCMResetStripCSR(void) 00806 { 00807 uint32_t bitToCheck = 0; 00808 BitManipulator::insertBits(bitToCheck, 1, 31, 2); 00809 return bitToCheck; 00810 } 00811 00812 //======================================================================================================================== 00813 void FSSROtsFirmware::resetDAC(void) 00814 { 00815 BitManipulator::insertBits(stripResetRegisterValue_, 1, 27, 1); 00816 } 00817 00818 //======================================================================================================================== 00819 void FSSROtsFirmware::resetLink(bool channel0, bool channel1, bool channel2, 00820 bool channel3, bool channel4, bool channel5) 00821 { 00822 stripResetRegisterValue_ = 0; 00823 BitManipulator::insertBits(stripResetRegisterValue_, 00824 ((uint32_t) channel0) + ((uint32_t) channel1 << 1) 00825 + ((uint32_t) channel2 << 2) + ((uint32_t) channel3 << 3) 00826 + ((uint32_t) channel4 << 4) + ((uint32_t) channel5 << 5), 00827 0, 6); 00828 BitManipulator::insertBits(stripResetRegisterValue_, 1, 29, 1); 00829 00830 // write(buffer, STRIP_RESET, (1<<28) + 00831 // ((uint32_t)channel0) + 00832 // ((uint32_t)channel1<<1) + 00833 // ((uint32_t)channel2<<2) + 00834 // ((uint32_t)channel3<<3) + 00835 // ((uint32_t)channel4<<4) + 00836 // ((uint32_t)channel5<<5) 00837 // ); 00838 00839 } 00840 00841 //======================================================================================================================== 00842 void FSSROtsFirmware::clearErrors(bool channel0, bool channel1, bool channel2, 00843 bool channel3, bool channel4, bool channel5) 00844 { 00845 stripResetRegisterValue_ = 0; 00846 BitManipulator::insertBits(stripResetRegisterValue_, 00847 ((uint32_t) channel0) + ((uint32_t) channel1 << 1) 00848 + ((uint32_t) channel2 << 2) + ((uint32_t) channel3 << 3) 00849 + ((uint32_t) channel4 << 4) + ((uint32_t) channel5 << 5), 00850 0, 6); 00851 BitManipulator::insertBits(stripResetRegisterValue_, 1, 29, 1); 00852 } 00853 00854 //======================================================================================================================== 00855 void FSSROtsFirmware::clearFIFO(bool channel0, bool channel1, bool channel2, 00856 bool channel3, bool channel4, bool channel5) 00857 { 00858 stripResetRegisterValue_ = 0; 00859 BitManipulator::insertBits(stripResetRegisterValue_, 00860 ((uint32_t) channel0) + ((uint32_t) channel1 << 1) 00861 + ((uint32_t) channel2 << 2) + ((uint32_t) channel3 << 3) 00862 + ((uint32_t) channel4 << 4) + ((uint32_t) channel5 << 5), 00863 0, 6); 00864 BitManipulator::insertBits(stripResetRegisterValue_, 1, 30, 1); 00865 } 00866 00867 //======================================================================================================================== 00868 void FSSROtsFirmware::resetChip(bool channel0, bool channel1, bool channel2, 00869 bool channel3, bool channel4, bool channel5) 00870 { 00871 stripResetRegisterValue_ = 0; 00872 BitManipulator::insertBits(stripResetRegisterValue_, 00873 ((uint32_t) channel0) + ((uint32_t) channel1 << 1) 00874 + ((uint32_t) channel2 << 2) + ((uint32_t) channel3 << 3) 00875 + ((uint32_t) channel4 << 4) + ((uint32_t) channel5 << 5), 00876 0, 6); 00877 BitManipulator::insertBits(stripResetRegisterValue_, 1, 31, 1); 00878 } 00879 00880 //======================================================================================================================== 00881 void FSSROtsFirmware::setFrequencyRatio(std::string& buffer, int numerator, int denominator) 00882 { 00883 //The device need to load numerator minus one and denominator minus one, with an internal address of 0x50 and 052 respectively 00884 OtsUDPFirmwareCore::write(buffer, STRIP_BCO_DCM, 0x80500000 + (numerator - 1)); // Set BCOCLK numerator // was 0x80500003 00885 //FIXME? Does Nothing RAR Aug 2017//OtsUDPFirmwareCore::waitClear(buffer, STRIP_BCO_DCM, 0xf0000000); // Wait DCM write to finish // was 0x80000000 00886 00887 OtsUDPFirmwareCore::write(buffer, STRIP_BCO_DCM, 0x80520000 + (denominator - 1)); // Set BCOCLK denominator // was 0x80520001 00888 //FIXME? Does Nothing RAR Aug 2017//OtsUDPFirmwareCore::waitClear(buffer, STRIP_BCO_DCM, 0xf0000000); // Wait DCM write to finish - BCO frequency should be 13.513 MHz // was 0x80000000 00889 } 00890 00891 //======================================================================================================================== 00892 void FSSROtsFirmware::BCOOffset(uint32_t offset) 00893 { 00894 BitManipulator::insertBits(stripTriggerCSRRegisterValue_, offset, 0, 4); 00895 } 00896 00897 //======================================================================================================================== 00898 void FSSROtsFirmware::selectSpyFIFO(uint32_t input) 00899 { 00900 BitManipulator::insertBits(stripTriggerCSRRegisterValue_, input, 4, 3); 00901 } 00902 00903 //======================================================================================================================== 00904 void FSSROtsFirmware::halt(bool halt) 00905 { 00906 BitManipulator::insertBits(stripTriggerCSRRegisterValue_, (uint32_t) halt, 7, 1); 00907 } 00908 00909 //======================================================================================================================== 00910 void FSSROtsFirmware::configureStripTriggerUnbiased(std::string& buffer) 00911 { 00912 OtsUDPFirmwareCore::write(buffer, STRIP_TRIG_UNBIASED, 0x002805c); // Configure unbiased trigger 00913 } 00914 00915 //======================================================================================================================== 00916 void FSSROtsFirmware::configureTriggerInputs(std::string& buffer) 00917 { 00918 OtsUDPFirmwareCore::write(buffer, STRIP_TRIG_INPUT_0, 0x3f440000); // FSSR GOTHIT trigger input channel 0,1 00919 OtsUDPFirmwareCore::write(buffer, STRIP_TRIG_INPUT_1, 0x3f440000); // FSSR GOTHIT trigger input channel 2,3 00920 OtsUDPFirmwareCore::write(buffer, STRIP_TRIG_INPUT_2, 0x0); // FSSR GOTHIT trigger input channel 4,5 00921 } 00922 00923 //======================================================================================================================== 00924 std::string FSSROtsFirmware::resetSlaveBCO(void) 00925 { 00926 std::string buffer; 00927 OtsUDPFirmwareCore::write(buffer, (uint64_t)0xc5000000, (uint64_t)0x00000008); 00928 return buffer; 00929 } 00930 00931 //======================================================================================================================== 00932 void FSSROtsFirmware::chipID(uint32_t size) 00933 { 00934 BitManipulator::insertBits(stripSCRegisterValue_, size, 0, 5); 00935 } 00936 00937 //======================================================================================================================== 00938 void FSSROtsFirmware::addressSlowControls(uint32_t size) 00939 { 00940 BitManipulator::insertBits(stripSCRegisterValue_, size, 5, 5); 00941 } 00942 00943 //======================================================================================================================== 00944 void FSSROtsFirmware::instructionSlowControls(uint32_t size) 00945 { 00946 BitManipulator::insertBits(stripSCRegisterValue_, size, 10, 3); 00947 } 00948 00949 //======================================================================================================================== 00950 void FSSROtsFirmware::channelreadSelect(uint32_t size) 00951 { 00952 BitManipulator::insertBits(stripSCRegisterValue_, size, 13, 3); 00953 } 00954 00955 //======================================================================================================================== 00956 void FSSROtsFirmware::channelMask(uint32_t size) 00957 { 00958 BitManipulator::insertBits(stripSCRegisterValue_, size, 16, 8); 00959 } 00960 00961 //======================================================================================================================== 00962 void FSSROtsFirmware::bitsLength(uint32_t length) 00963 { 00964 BitManipulator::insertBits(stripSCRegisterValue_, length, 26, 3); 00965 } 00966 00967 00968 //======================================================================================================================== 00969 void FSSROtsFirmware::syncFallingBCO(bool sync) 00970 { 00971 BitManipulator::insertBits(stripSCRegisterValue_, (uint32_t)sync, 28, 1); 00972 } 00973 00974 //======================================================================================================================== 00975 void FSSROtsFirmware::syncRisingBCO(bool sync) 00976 { 00977 BitManipulator::insertBits(stripSCRegisterValue_, (uint32_t)sync, 29, 1); 00978 } 00979 00980 //======================================================================================================================== 00981 void FSSROtsFirmware::setRaw(bool set) 00982 { 00983 BitManipulator::insertBits(stripSCRegisterValue_, (uint32_t)set, 30, 1); 00984 } 00985 00986 //======================================================================================================================== 00987 void FSSROtsFirmware::initSlowControls(bool init) 00988 { 00989 BitManipulator::insertBits(stripSCRegisterValue_, (uint32_t)init, 31, 1); 00990 } 00991 00992 //======================================================================================================================== 00993 void FSSROtsFirmware::resetCount(bool reset) 00994 { 00995 BitManipulator::insertBits(stripAnalysisCSRRegisterValue_, (uint32_t)reset, 30, 1); 00996 } 00997 00998 //======================================================================================================================== 00999 void FSSROtsFirmware::setBCO_0(uint32_t void FSSROtsFirmware::BCOOffset(uint32_t offset) 01000 { 01001 BitManipulator::insertBits(stripTrigCSRRegisterValue_, offset, 0, 4); 01002 }input) 01003 { 01004 BitManipulator::insertBits(trigInputRegisterValue_, input, 0, 8); 01005 } 01006 01007 //======================================================================================================================== 01008 void FSSROtsFirmware::setBCO_1(uint32_t input) 01009 { 01010 BitManipulator::insertBits(trigInputRegisterValue_, input, 8, 8); 01011 } 01012 01013 //======================================================================================================================== 01014 void FSSROtsFirmware::trimFracBCO_0(uint32_t input) 01015 { 01016 BitManipulator::insertBits(trigInputRegisterValue_, input, 16, 4); 01017 } 01018 01019 //======================================================================================================================== 01020 void FSSROtsFirmware::trimFracBCO_1(uint32_t input) 01021 { 01022 BitManipulator::insertBits(trigInputRegisterValue_, input, 20, 4); 01023 } 01024 01025 //======================================================================================================================== 01026 void FSSROtsFirmware::enable_0(bool enable) 01027 { 01028 BitManipulator::insertBits(trigInputRegisterValue_, (uint32_t)enable, 28, 1); 01029 } 01030 01031 //======================================================================================================================== 01032 void FSSROtsFirmware::enable_1(bool enable) 01033 { 01034 BitManipulator::insertBits(trigInputRegisterValue_, (uint32_t)enable, 29, 1); 01035 } 01036 01037 */